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NTIS 바로가기IEEE electron device letters : a publication of the IEEE Electron Devices Society, v.36 no.8, 2015년, pp.739 - 741
Duhan, Pardeep (Dept. of Electr. Eng., IIT Bombay, Mumbai, India) , Ganeriwala, Mohit D. (Dept. of Electr. Eng., IIT Gandhinagar, Ahmedabad, India) , Rao, V. Ramgopal (Dept. of Electr. Eng., IIT Bombay, Mumbai, India) , Mohapatra, Nihar R. (Dept. of Electr. Eng., IIT Gandhinagar, Ahmedabad, India)
This letter analyzes the width dependence of gate current observed in nMOS transistors fabricated using the 28-nm gate-first CMOS process. It is experimentally shown that the gate current density is ~10× lower for 80-nm wide high permittivity (K) dielectrics and metal gate nMOS transistors co...
Guha, Supratik, Narayanan, Vijay. Oxygen Vacancies in High Dielectric Constant Oxide-Semiconductor Films. Physical review letters, vol.98, no.19, 196101-.
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Kerber, A., Cartier, E., Pantisano, L., Degraeve, R., Kauerauf, T., Kim, Y., Hou, A., Groeseneken, G., Maes, H.E., Schwalke, U.. Origin of the threshold voltage instability in SiO2/HfO2 dual layer gate dielectrics. IEEE electron device letters : a publication of the IEEE Electron Devices Society, vol.24, no.2, 87-89.
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Walke, A. M., Mohapatra, N. R..
Effects of Small Geometries on the Performance of Gate First High-
Borkar, Shekhar, Chien, Andrew A.. The future of microprocessors. Communications of the ACM, vol.54, no.5, 67-77.
Proc Symp VLSI Technol A cost effective 32 nm high- $\kappa$ /metal gate CMOS technology for low power applications with single-metal/gate-first process chen 2008 88
Proc SSDM Effects of HfO2 and lanthanum capping layer thickness on the narrow width behavior of gate first high- $\kappa $ and metal gate NMOS transistors naresh 2013 79
Proc Symp VLSI Technol High-performance high- $\kappa $ /metal gates for 45 nm CMOS and beyond with gate-first processing chudzik 2007 194
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