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NTIS 바로가기IEEE transactions on electron devices, v.63 no.4, 2016년, pp.1774 - 1778
Sang Wan Kim (Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, Berkeley, CA, USA) , Jang Hyun Kim (Dept. of Electr. & Comput. Eng., Inter-Univ. Semicond. Res. Center, Seoul, South Korea) , Tsu-Jae King Liu (Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, Berkeley, CA, USA) , Woo Young Choi , Byung-Gook Park
An L-shaped tunnel FET (TFET), which features band-to-band tunneling (BTBT) perpendicular to the channel direction, is experimentally demonstrated for the first time. It is more scalable than other vertical-BTBT-based TFET designs and provides more than 1000x higher ON-current (I-ON) than a conventi...
Yang, K.J., Hu, Chenming. MOS capacitance measurements for high-leakage thin dielectrics. IEEE transactions on electron devices, vol.46, no.7, 1500-1501.
Zhao, Q. T., Hartmann, J. M., Mantl, S..
An Improved Si Tunnel Field Effect Transistor With a Buried Strained
Huang, Ru, Huang, Qianqian, Chen, Shaowen, Wu, Chunlei, Wang, Jiaxin, An, Xia, Wang, Yangyuan. High performance tunnel field-effect transistor by gate and source engineering. Nanotechnology, vol.25, no.50, 505201-.
Mookerjea, Saurabh, Mohata, Dheeraj, Mayer, Theresa, Narayanan, Vijay, Datta, Suman.
Temperature-Dependent
Leonelli, Daniele, Vandooren, Anne, Rooyackers, Rita, Verhulst, Anne S., Gendt, Stefan De, Heyns, Marc M., Groeseneken, Guido. Silicide Engineering to Boost Si Tunnel Transistor Drive Current. Japanese journal of applied physics, vol.50, no.4, 04DC05-.
Nicollian, E. H., Goetzberger, A.. The Si-SiO2Interface - Electrical Properties as Determined by the Metal-Insulator-Silicon Conductance Technique. The Bell System technical journal, vol.46, no.6, 1055-1133.
J Nanosci Nanotechnol Electrical characteristics of MOS capacitor with high-k/metal gate using oxygen scavenging process lee 0
VLSI Tech Dig Strained tunnel FETs with record ION: First demonstration of ETSOI TFETs with SiGe channel and RSD villalon 2012 49
Kim, Sang Wan, Choi, Woo Young, Sun, Min-Chul, Kim, Hyun Woo, Park, Byung-Gook. Design Guideline of Si-Based L-Shaped Tunneling Field-Effect Transistors. Japanese journal of applied physics, vol.51, no.6, 06FE09-.
VLSI Tech Dig Synthetic electric field tunnel FETs: Drain current multiplication demonstrated by wrapped gate electrode around ultrathin epitaxial channel morita 2013 236t
VLSI Tech Dig Germanium-source tunnel field effect transistors with record high ION/IOFF kim 2009 178
Choi, Woo Young, Park, Byung-Gook, Lee, Jong Duk, Liu, Tsu-Jae King. Tunneling Field-Effect Transistors (TFETs) With Subthreshold Swing (SS) Less Than 60 mV/dec. IEEE electron device letters : a publication of the IEEE Electron Devices Society, vol.28, no.8, 743-745.
Kim, Sang Wan, Choi, Woo Young, Sun, Min-Chul, Park, Byung-Gook. Investigation on the Corner Effect of L-Shaped Tunneling Field-Effect Transistors and Their Fabrication Method. Journal of nanoscience and nanotechnology, vol.13, no.9, 6376-6381.
De Michielis, Luca, Lattanzio, Livio, Moselund, Kirsten E., Riel, Heike, Ionescu, Adrian M.. Tunneling and Occupancy Probabilities: How Do They Affect Tunnel-FET Behavior?. IEEE electron device letters : a publication of the IEEE Electron Devices Society, vol.34, no.6, 726-728.
IEDM Tech Dig High Ion/Ioff Ge-source ultrathin body strained-SOI tunnel FETs kim 2014 13.2.1
De Michielis, L., Lattanzio, L., Ionescu, A. M.. Understanding the Superlinear Onset of Tunnel-FET Output Characteristic. IEEE electron device letters : a publication of the IEEE Electron Devices Society, vol.33, no.11, 1523-1525.
IEDM Tech Dig Experimental realization of complementary p- and n-tunnel FinFETs with subthreshold slopes of less than 60 mV/decade and very low (pA/ $\mu $ m) off-current on a Si CMOS platform morita 2014 9.7.1
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