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2. Plouchart, J. O., Kim, J., Karam, V., Trzcinski, R., & Gross, J. (2006). Performance variation of a 66 GHz static CML divider in a 90 nm SOI CMOS. In ISSCC Digest of Technical papers (pp. 526-527). 

3. IEEE Microwave and Wireless Components Letters C Cao 15 11 721 2005 10.1109/LMWC.2005.858998 Cao, C., & Kenneth, K. O. (2005). A power efficient 26-GHz 32:1 static frequency divider in 130-nm bulk CMOS. IEEE Microwave and Wireless Components Letters, 15(11), 721-723. 

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4. Transactions on Electrical and Electronics Materials J Park 15 6 309 2014 10.4313/TEEM.2014.15.6.309 Park, J., Ahn, S., Jeong, H., & Kim, N. (2014). High-speed CMOS frequency divider with inductive peaking technique. Transactions on Electrical and Electronics Materials, 15(6), 309-314. 

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5. Proceedings of IEEE International Symposium on ISVLSI HS Fazeel 2009 7 2009 Fazeel, H. S., Raghavan, L., Srinivasaraman, C., & Jain, M. (2009). Reduction of current mismatch in PLL charge pump. Proceedings of IEEE International Symposium on ISVLSI, 2009, 7-12. 

6. IEEE Transactions on Instrumentation and Measurement M Karimi-Ghartemani 61 4 930 2012 10.1109/TIM.2011.2172999 Karimi-Ghartemani, M., Khajehoddin, S. A., Jain, P. K., & Bakhshai, A. (2012). Deviation and design of in-loop filters in phase-locked loop systems. IEEE Transactions on Instrumentation and Measurement, 61(4), 930-940. 

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7. Analog Integrated Circuits and Signal Processing J Park 83 143 2015 10.1007/s10470-015-0517-z Park, J., Choi, H., & Kim, N. (2015). Two-stage feedback-looped charge-pump for spur-reduction in CMOS PLL. Analog Integrated Circuits and Signal Processing, 83, 143-148. 

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8. IEEE Journal of Solid-State Circuits H Tong 42 2 313 2007 10.1109/JSSC.2006.889387 Tong, H., Cheng, S., Karsilayan, A. I., & Martinez, J. S. (2007). An injection-locked frequency divider with multiple highly nonlinear injection stages and large division ratios. IEEE Journal of Solid-State Circuits, 42(2), 313-321. 

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9. IEEE Microwave and Wireless Components Letters M Jalalifar 24 12 881 2014 10.1109/LMWC.2014.2360355 Jalalifar, M., & Byun, G. (2014). A K-band divide-by-five injection-locked frequency divider using a near-threshold VCO. IEEE Microwave and Wireless Components Letters, 24(12), 881-883. 

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10. IEEE Transactions on Circuits and Systems I A Buonomo 60 12 3126 2011 10.1109/TCSI.2013.2265977 Buonomo, A., Schiavo, A., Awan, M., Asghar, M., & Kenndy, M. (2011). A CMOS injection-locked frequency divider optimized for divide-by-two and divide-by-three operation. IEEE Transactions on Circuits and Systems I, 60(12), 3126-3135. 

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11. IEEE Journal of Solid-State Circuits M Tiebout 39 7 1170 2004 10.1109/JSSC.2004.829937 Tiebout, M. (2004). A CMOS direct injection-locked oscillator topology as high-frequency low-power frequency divider. IEEE Journal of Solid-State Circuits, 39(7), 1170-1174. 

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12. IEEE Microwave and Wireless Components Letters Y Ku 18 12 881 2008 Ku, Y., & Cho, S. (2008). An optimum current mirror ratio for low phase noise LC-VCO. IEEE Microwave and Wireless Components Letters, 18(12), 881-883.