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NTIS 바로가기IEEE transactions on computers, v.65 no.10, 2016년, pp.3027 - 3040
Wongyu Shin , Jungwhan Choi , Jaemin Jang , Jinwoong Suh , Youngsuk Moon , Yongkee Kwon , Lee-Sup Kim
It is widely known that relatively long DRAM latency forms a bottleneck in computing systems. However, DRAM vendors are strongly reluctant to decrease DRAM latency due to the additional manufacturing cost. Therefore, we set our goal to reduce DRAM latency without any modification in the existing DRA...
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