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6. HARPREET KAUR*, AJAYPAL SINGH and LIPIKA GUPTA, Department of Electronics and Communication, Chitkara University, Himachal Pradesh-125001, India, FbbCmos Tapered Buffer With Optimal Vth Selection, Journal on Today's Ideas -Tomorrow's Technologies,Vol. 2, No. 1,June 2014pp. 1-13. 

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8. Mr.AnkurSaxena*, Mr.SumitKhandelwal A Novel Design Approach for CMOS Tapered Buffer for Low Power and Low Delay Applications Volume 2 2015 Issue 4 JULY-AUG IJBRITISH.