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NTIS 바로가기Electronics Packaging Technology Conference (EPTC), 2014 IEEE 16th, 2014 Dec, 2014년, pp.400 - 404
Xie, Ling (Institute of Microelectronics, A∗) , Wickramanayaka, Sunil (STAR (Agency for Science, Technology and Research), 11 Science Park Road, Singapore Science Park II, Singapore 117685) , Jung, Boo Yung (Institute of Microelectronics, A∗) , Li, Jerry Aw Jie (STAR (Agency for Science, Technology and Research), 11 Science Park Road, Singapore Science Park II, Singapore 117685) , Jung-kai, Lim (Institute of Microelectronics, A∗) , Ismael, Daniel (STAR (Agency for Science, Technology and Research), 11 Science Park Road, Singapore Science Park II, Singapore 117685)
A wafer level under-fill (WLUF) process for ultra-fine Cu-Cu bonding is developed. Under-fill is applied as pre-applied under-fill then planarized the surface. The methodology used for surface planarization (bit grinding) and surface treatment (H2 plasma) are fond to be important in the surface prep...
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