A SiGe monocrystalline etch-stop material system on a monocrystalline silicon substrate. The etch-stop material system can vary in exact composition, but is a doped or undoped Si1-xGexalloy with x generally between 0.2 and 0.5. Across its thickness, the etch-stop material itself is uniform in compos
A SiGe monocrystalline etch-stop material system on a monocrystalline silicon substrate. The etch-stop material system can vary in exact composition, but is a doped or undoped Si1-xGexalloy with x generally between 0.2 and 0.5. Across its thickness, the etch-stop material itself is uniform in composition. The etch stop is used for micromachining by aqueous anisotropic etchants of silicon such as potassium hydroxide, sodium hydroxide, lithium hydroxide, ethylenediamine/pyrocatechol/pyrazine (EDP), TMAH, and hydrazine. These solutions generally etch any silicon containing less than7×1019cm−3of boron or undoped Si1-xGexalloys with x less than approximately 18. Alloying silicon with moderate concentrations of germanium leads to excellent etch selectivities, i.e., differences in etch rate versus pure undoped silicon. This is attributed to the change in energy band structure by the addition of germanium. Furthermore, the nondegenerate doping in the Si1-xGexalloy should not affect the etch-stop behavior. The etch-stop of the invention includes the use of a graded-composition buffer between the silicon substrate and the SiGe etch-stop material. Nominally, the buffer has a linearly-changing composition with respect to thickness, from pure silicon at the substrate/buffer interface to a composition of germanium, and dopant if also present, at the buffer/etch-stop interface which can still be etched at an appreciable rate. Here, there is a strategic jump in germanium and concentration from the buffer side of the interface to the etch-stop material, such that the etch-stop layer is considerably more resistant to the etchant. This process and layer structure allows for an entire range of new materials for microelectronics. The etch-stop capabilities introduce new novel processes and structures such as relaxed SiGe alloys on Si, SiO2, and SiO2/Si. Such materials are useful for future strained Si MOSFET devices and circuits.
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1. A monocrystalline etch-stop layer system for use on a monocrystalline Si substrate, said system comprising a substantially relaxed graded layer of SiGe, and a uniform etch-stop layer of substantially relaxed SiGe. 2. The system of claim 1, wherein x0.19. 4. The system of claim 1, wherein x0.19. 5
1. A monocrystalline etch-stop layer system for use on a monocrystalline Si substrate, said system comprising a substantially relaxed graded layer of SiGe, and a uniform etch-stop layer of substantially relaxed SiGe. 2. The system of claim 1, wherein x0.19. 4. The system of claim 1, wherein x0.19. 5. The system of claim 1, wherein said SiGelayer is bonded to a second substrate. 6. The system of claim 5, wherein said second substrate comprises Si. 7. The system of claim 5, wherein said second substrate comprises glass. 8. The system of claim 5., wherein said second substrate comprises quartz. 9. The system of claim 5, wherein said second substrate comprises a layer of SiOon a second Si substrate. 10. The system of claim 5, wherein the first Si substrate and graded layer are substantially removed. 11. The system of claim 6, wherein the first Si substrate and graded layer are substantially removed. 12. The system of claim 7, wherein the first Si substrate and graded layer are substantially removed. 13. The system of claim 8, wherein the first Si substrate and graded layer are substantially removed. 14. The system of claim 9, wherein the first Si substrate and graded layer are substantially removed. 15. The system of claim 1, wherein a SiOlayer is deposited onto said SiGelayer. 16. The system of claim 15, wherein said SiOlayer is bonded to a second substrate. 17. The system of claim 16, wherein said second substrate comprises a layer of SiOon a second Si substrate. 18. The system of claim 16, wherein said second substrate comprises a layer of SiOon a glass substrate. 19. The system of claim 16, wherein said second substrate comprises a layer of SiOon a quartz substrate. 20. The system of claim 16, wherein the first Si substrate and graded layer are substantially removed. 21. The system of claim 17, wherein the first Si substrate and graded layer are substantially removed. 22. The system of claim 18, wherein the first Si substrate and graded layer are substantially removed. 23. The system of claim 19, wherein the first Si substrate and graded layer are substantially removed. 24. The system of claim 10, wherein the surface is planarized. 25. The system of claim 11, wherein the surface is planarized. 26. The system of claim 12, wherein the surface is planarized. 27. The system of claim 13, wherein the surface is planarized. 28. The system of claim 14, wherein the surface is planarized. 29. The system of claim 20, wherein the surface is planarized. 30. The system of claim 21, wherein the surface is planarized. 31. The system of claim 22, wherein the surface is planarized. 32. The system of claim 23, wherein the surface is planarized. 33. A monocrystalline etch-stop layer system for use on a monocrystalline Si substrate, said system comprising a substantially relaxed graded layer of SiGea uniform etch-stop layer of substantially relaxed SiGe; and a strained SiGelayer. 34. The system of claim0.33, wherein z0.18. 36. The system of claim 33, wherein y>0.18 and z0.18 and z=0. 38. The system of claim 33, wherein said SiGeis bonded to a second substrate. 39. The system of claim 38, wherein said second substrate comprises Si. 40. The system of claim 38, wherein said second substrate comprises glass. 41. The system of claim 38, wherein said second substrate comprises quartz. 42. The system of claim 38, wherein said second substrate comprises a layer of SiOon a second Si substrate. 43. The system of claim 38, wherein the first Si substrate and graded layer are substantially removed. 44. The system of claim 39, wherein the first Si substrate and graded layer are substantially removed. 45. The system of claim 40, wherein the first Si substrate and graded layer are substantially removed. 46. The system of claim 41, wherein the first Si substrate and graded layer are substantially removed. 47. The system of claim 42, wherein the first Si substrate and graded layer are substantially removed. 48. The structure in claim 33 in which a SiOlayer is deposited onto said SiGelayer. 49. The system of claim 48, wherein said SiOlayer is bonded to a second substrate. 50. The system of claim 49, wherein the second substrate comprises a layer of SiOon a second Si substrate. 51. The system of claim 49, wherein the second substrate comprises a layer of SiOon a glass substrate. 52. The system of claim 49, wherein the second substrate comprises a layer of SiOon a quartz substrate. 53. The system of claim 49, wherein the first Si substrate and graded layer are substantially removed. 54. The system of claim 50, wherein the first Si substrate and graded layer are substantially removed. 55. The system of claim 51, wherein the first Si substrate and graded layer are substantially removed. 56. The system of claim 52, wherein the first Si substrate and graded layer are substantially removed. 57. A monocrystalline etch-stop layer system for use on a monocrystalline Si substrate, comprising a substantially relaxed graded layer of SiGe; a uniform etch-stop layer of substantially relaxed SiGe; a second etch-stop layer of strained SiGe; and a substantially relaxed SiGelayer. 58. The system of claim 57, wherein y−0.050.19. 83. The method of claim 80, wherein x0.19. 84. The method of claim 80, wherein the etchant used to release the etch-stop layer is KOH. 85. The method of claim 80, wherein the etchant used to release the etch-stop layer is TMAH. 86. The method of claim. 80, wherein the etchant used to release the etch-stop layer is EDP. 87. The method of claim 80, wherein the etch-stop is released and the etch-stop layer is planarized. 88. The method of claim 87, wherein the method of planarization is chemical-mechanical polishing (CMP). 89. A method of integrating a device or layer comprising:depositing a substantially relaxed graded layer of SiGeon a Si substrate; depositing a uniform first etch-stop layer of substantially relaxed SiGeon said graded buffer; depositing a second etch-stop layer of strained SiGe; depositing a substantially relaxed SiGelayer; etching portions of said substrate and said graded buffer in order to release said first etch-stop layer; and etching portions of said residual graded buffer in order to release the second etch-stop SiGelayer. 90. The method of claim 89, wherein the etchant used to release the second etch-stop layer comprises an oxidant and an oxide stripping agent. 91. The method of claim 90, wherein the oxidant oxidizes Ge much more rapidly than Si. 92. The method of claim 90, wherein the oxidant comprises HO. 93. The method of claim 90, wherein the stripping agent comprises HF. 94. The method of claim 90, wherein the oxidant comprises HOand the stripping agent comprises HF. 95. The method of claim 94, wherein the diluting agent comprises CHCOOH. 96. The method of claim 95, wherein the ratio of chemicals in the etchant are (1:2:3) for (HF:HO:CHCOOH). 97. The method of claim 89, wherein wet oxidation is used to selectively oxidize the SiGe; and Si, thereby acting as an etch-stop with respect to SiGe. 98. The method of claim 97, wherein the wet oxidation temperature is 0.19. 116. (New) The semiconductor structure of claim 113, wherein the uniform etch-stop layer comprises a silicon dioxide layer. 117. (New) The semiconductor structure of claim 113, wherein a surface of the uniform etch-stop layer is planarized. 118. (New) The semiconductor structure of claim 112, wherein the layer structure comprises a strained layer disposed over the uniform etch stop layer. 119. (New) The semiconductor structure of claim 118, wherein the strained layer comprises SiGeand 0≦z0.19. 130. (New) The semiconductor structure of claim 125, wherein the substantially relaxed layer is disposed over the uniform etch-stop layer. 131. (New) The semiconductor structure of claim 130, further comprising:a semiconductor substrate disposed over the relaxed layer. 132. (New) The semiconductor structure of claim 125, wherein the substantially relaxed layer is disposed under the uniform etch-stop layer. 133. (New) The semiconductor structure of claim 132, wherein the layer structure comprises a first strained layer disposed over the uniform etch-stop layer. 134. (New) The semiconductor structure of claim 132, wherein the first strained layer comprises SiGeand 0≦z<1. 135. (New) A semiconductor structure, comprising:a layer structure including a strained SiGelayer, and a handle wafer comprising an insulator, the layer structure being bonded to the handle wafer, wherein 0
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