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Radiation hardened CMOS on SOI or SOS devices 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-027/01
  • H01L-027/12
출원번호 US-0304759 (1989-01-31)
발명자 / 주소
  • Bahraman Ali (Palos Verdes Estates CA)
출원인 / 주소
  • The United States of America as represented by the Secretary of the Air Force (Washington DC 06)
인용정보 피인용 횟수 : 63  인용 특허 : 5

초록

A radiation hardened CMOS transistor has a source region, drain region and channel region formed on an SOI or SOS wafer. End plugs of opposite conductivity to that of the source and drain regions are connected to the channel region. In one embodiment, the end plugs extend along opposite ends of the

대표청구항

A radiation hardened MOS SOI or SOS transistor comprising: a silicon-on-insulator or a silicon-on-sapphire wafer; a source region formed on said wafer; a drain region formed on said wafer; a channel region formed on said wafer between and contiguous with said source region and said drain region; sai

이 특허에 인용된 특허 (5)

  1. Blake Terence G. W. (Dallas TX), Making a silicon-on-insulator transistor with selectable body node to source node connection.
  2. Uchida Yukimasa (Yokohama JPX), SOS MOSFET With self-aligned channel contact.
  3. Uchida Yukimasa (Yokohama JPX), SOS Mosfet with thinned channel contact region.
  4. Shirato Takehide (Hiratsuka JPX) Aneha Nobuhiko (Yokohama JPX), Semiconductor device having a silicon on insulator structure.
  5. Cricchi James R. (Catonsville MD) Fitzpatrick Michael D. (Glen Burnie MD), Silicon on sapphire MOS transistor.

이 특허를 인용한 특허 (63)

  1. Willard, Simon Edward; Ranta, Tero Tapio, AC coupling modules for bias ladders.
  2. Marcotte, Amy L.; Krumanaker, David; Felder, Kevin, Adjustable height gastric restriction devices and methods.
  3. Dlugos, Daniel F., Apparatus for adjustment and sensing of gastric band pressure.
  4. Patterson, Janet, Apparatus for shielding integrated circuit devices.
  5. Patterson, Janet, Apparatus for shielding integrated circuit devices.
  6. Ortiz, Mark S.; Dlugos, Jr., Daniel F.; Plescia, David N.; Yates, David C.; Harris, Jason L.; Zeiner, Mark S., Automatically adjusting band system.
  7. Ortiz, Mark S.; Dlugos, Jr., Daniel F.; Plescia, David N.; Yates, David C.; Harris, Jason L.; Zeiner, Mark S., Automatically adjusting band system with MEMS pump.
  8. Sreenath Unnikrishnan, Body-tied-to-source partially depleted SOI MOSFET.
  9. Dribinsky, Alexander; Kim, Tae Youn; Kelly, Dylan J.; Brindle, Christopher N., Circuit and method for controlling charge injection in radio frequency switches.
  10. Shapiro, Eric S.; Allison, Matt, Circuit and method for improving ESD tolerance and switching speed.
  11. Coe, Jonathan A.; Ortiz, Mark S.; Moore, Kyle P.; Overmyer, Mark D.; Adams, Thomas E.; Zwolinski, Andrew M., Constant force mechanisms for regulating restriction devices.
  12. Coe, Jonathan A.; Adams, Thomas E.; Overmyer, Mark D., Controlling pressure in adjustable restriction devices.
  13. Coe, Jonathan A.; Widenhouse, Christopher W.; Adams, Thomas E.; Ezolino, Juan S.; Martin, David, Controlling pressure in adjustable restriction devices.
  14. Ranta, Tero Tapio; Bawell, Shawn; Greene, Robert W.; Brindle, Christopher N.; Englekirk, Robert Mark, Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals.
  15. Ranta, Tero Tapio; Bawell, Shawn; Greene, Robert W.; Brindle, Christopher N.; Englekirk, Robert Mark, Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals.
  16. Bawell, Shawn; Broughton, Robert; Bacon, Peter; Greene, Robert W.; Ranta, Tero Tapio, Digitally tuned capacitors with tapered and reconfigurable quality factors.
  17. Dlugos, Daniel F.; Hassler, Jr., William L., External pressure-based gastric band adjustment system and method.
  18. Dlugos, Jr., Daniel F.; Brockmeier, Peter; Berger, Matthew A.; Byrum, Randal T.; Doll, Kevin R.; Gayoso, Gaspar M.; Jensen, Dustin R.; Krumanaker, David T.; Marcotte, Amy L.; Ortiz, Mark S.; Plescia, David N.; Yates, David C., GUI for an implantable restriction device and a data logger.
  19. Ortiz, Mark S.; Plescia, David N.; Dlugos, Jr., Daniel F.; Yates, David C.; Doll, Kevin, Gastric restriction device data handling devices and methods.
  20. Ueda Kimio,JPX ; Hirota Takanori,JPX ; Wada Yoshiki,JPX ; Mashiko Koichiro,JPX, Gate array semiconductor device.
  21. Miller ; Jr. James E. ; Ma Manny K. F., High resistance integrated circuit resistor.
  22. Miller ; Jr. James E. ; Ma Manny K. F., High resistivity integrated circuit resistor.
  23. Nobbe, Dan William; Olson, Chris; Kovac, David, Hot carrier injection compensation.
  24. Burgener, Mark L.; Cable, James S., Integrated RF front end with stacked transistor switch.
  25. Burgener, Mark L.; Cable, James S., Integrated RF front end with stacked transistor switch.
  26. Longden,Larry L.; Patterson,Janet, Method and apparatus for shielding an integrated circuit from radiation.
  27. Ranta, Tero Tapio, Method and apparatus for use in digitally tuning a capacitor in an integrated circuit device.
  28. Brindle, Christopher N.; Stuber, Michael A.; Kelly, Dylan J.; Kemerling, Clint L.; Imthurn, George P.; Welstand, Robert B.; Burgener, Mark L., Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink.
  29. Brindle, Christopher N.; Stuber, Michael A.; Kelly, Dylan J.; Kemerling, Clint L.; Imthurn, George; Welstand, Robert B.; Burgener, Mark L., Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink.
  30. Brindle, Christopher N.; Deng, Jie; Genc, Alper; Yang, Chieh-Kai, Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction.
  31. Summer, Steven E., Method for implementing radiation hardened, power efficient, non isolated low output voltage DC/DC converters with non-radiation hardened components.
  32. Yukihito Oowaki JP; Masako Yoshida JP; Makoto Yoshimi JP, Method of manufacturing semiconductor memory device.
  33. Reedy, Ronald Eugene; Nobbe, Dan William; Ranta, Tero Tapio; Liss, Cheryl V.; Kovac, David, Methods and apparatuses for use in tuning reactance in a circuit device.
  34. Dlugos, Jr., Daniel F.; Ortiz, Mark S.; Marcotte, Amy L.; Byrum, Randal T.; Plescia, David N.; Harris, Jason L.; Zeiner, Mark S., Methods and devices for diagnosing performance of a gastric restriction system.
  35. Ortiz, Mark S.; Dlugos, Jr., Daniel F.; Marcotte, Amy L.; Plescia, David N.; Yates, David C., Methods and devices for measuring impedance in a gastric restriction system.
  36. Ortiz, Mark S.; Dlugos, Jr., Daniel F.; Marcotte, Amy L.; Byrum, Randal T.; Doll, Kevin, Methods for implanting a gastric restriction device.
  37. Hassler, Jr., William L.; Dlugos, Daniel F.; Jensen, Dustin R., Monitoring of a food intake restriction device.
  38. Dlugos, Daniel F.; Hassler, Jr., William L., Non-invasive pressure measurement in a fluid adjustable restrictive device.
  39. Dlugos, Jr., Daniel F.; Brockmeier, Peter; Berger, Matthew A; Byrum, Randal T.; Doll, Kevin R.; Gayoso, Gaspar M.; Jensen, Dustin R.; Krumanaker, David T.; Marcotte, Amy L.; Ortiz, Mark S.; Plescia, David N.; Yates, David C., Physiological parameter analysis for an implantable restriction device and a data logger.
  40. Ranta, Tero Tapio, Positive logic digitally tunable capacitor.
  41. Facchini, Marc; Bacon, Peter, Power splitter with programmable output phase shift.
  42. Dlugos, Jr., Daniel F.; Ortiz, Mark S.; Marcotte, Amy L.; Plescia, David N.; Harris, Jason L.; Zeiner, Mark S.; Stokes, Michael J.; Conlon, Sean P.; Yates, David C., Powering implantable restriction systems using kinetic motion.
  43. Dlugos, Jr., Daniel F.; Ortiz, Mark S.; Plescia, David N.; Stokes, Michael J., Powering implantable restriction systems using light.
  44. Bedell, Stephen W.; Hekmatshoartabari, Bahman; Khakifirooz, Ali; Shahidi, Ghavam G.; Shahrjerdi, Davood, Radiation hardened SOI structure and method of making same.
  45. Bedell, Stephen W.; Hekmatshoartabari, Bahman; Khakifirooz, Ali; Shahidi, Ghavam G.; Shahrjerdi, Davood, Radiation hardened SOI structure and method of making same.
  46. Coe, Jonathan A.; Chen, Christine; Ezolino, Juan S.; Felder, Kevin D.; Thompson, Eric, Reorientation port.
  47. Cherne, Richard D.; Clark, II, Jack E.; Dejong, Glenn A.; Lichtel, Richard L.; Morris, Wesley H.; Speece, William H., SOI CMOS device having body extension for providing sidewall channel stop and bodytie.
  48. Huang Wen Ling Margaret ; Tseng Ying-Che, SOI FET having gate sub-regions conforming to t-shape.
  49. Yamazaki, Yasushi, Semiconductor device, semiconductor gate array, electro-optical device, and electronic equipment.
  50. Yamazaki, Yasushi, Semiconductor device, semiconductor gate array, electro-optical device, and electronic equipment.
  51. Olson, Chris, Semiconductor devices with switchable ground-body connection.
  52. Hidaka Hideto,JPX ; Tsuruda Takahiro,JPX, Semiconductor memory and semiconductor device having SOI structure.
  53. Oowaki Yukihito,JPX ; Yoshida Masako,JPX ; Yoshimi Makoto,JPX, Semiconductor memory device.
  54. Oowaki Yukihito,JPX ; Yoshida Masako,JPX ; Yoshimi Makoto,JPX, Semiconductor memory device.
  55. Oowaki, Yukihito; Yoshida, Masako; Yoshimi, Makoto, Semiconductor memory device including a pair of MOS transistors forming a detection circuit.
  56. Carroll, Michael; Kerr, Daniel Charles; Iversen, Christian Rye; Mason, Philip; Costa, Julio; Spears, Edward T., Semiconductor radio frequency switch with body contact.
  57. Burgener, Mark L.; Cable, James S., Switch circuit and method of switching radio frequency signals.
  58. Burgener, Mark L.; Cable, James S., Switch circuit and method of switching radio frequency signals.
  59. Ferreri, Annie L.; Dlugos, Daniel F.; Plescia, David N.; Hassler, Jr., William L., System and method for determining implanted device orientation.
  60. Hassler, Jr., William L.; Dlugos, Daniel F.; Weaner, Lauren S.; Holscher, Russell L.; Ferreri, Annie L., System and method for determining implanted device positioning and obtaining pressure data.
  61. Coe, Jonathan A.; Ortiz, Mark S.; Stokes, Michael J.; Chen, Christine Hsin Yi; Ezolino, Juan S.; Felder, Kevin D.; Thompson, Eric W.; Yates, David C.; Plescia, David N., System and method of aligning an implantable antenna.
  62. Dlugos, Jr., Daniel F.; Ortiz, Mark S.; Plescia, David N.; Leuenberger, Mark, System and method of sterilizing an implantable medical device.
  63. Burr James B. ; Houston Theodore W., Tunable threshold SOI device using back gate well.
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