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Planarization and etch back process for semiconductor layers 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • A01L-021/311
출원번호 US-0429811 (1995-04-27)
발명자 / 주소
  • Huang Yuan-Chang (Hsin-Chu TWX) Wang Chin-Kun (San-Chung TWX)
출원인 / 주소
  • Taiwan Semiconductor Manufacturing Co. (Hsinchu TWX 03)
인용정보 피인용 횟수 : 23  인용 특허 : 0

초록

An improved process for planarization of an integrated circuit structure having raised portions is provided. A conformal insulating layer is deposited over the structure. Next, a sacrificial dielectric layer is formed over the insulating layer. A planarization layer is formed over the dielectric lay

대표청구항

A method for planarization of an integrated circuit structure, said structure having metallurgy lines having a given thickness; the method which comprises; (a) depositing a silicon oxide insulating layer over said structure having a thickness greater than said thickness of said metallurgy lines; (b)

이 특허를 인용한 특허 (23)

  1. Jang Syun-Ming,TWX ; Chang Chung-Long,TWX ; Jeng Shwangming,TWX ; Yu Chen-Hua,TWX, Etchback method for forming microelectronic layer with enhanced surface smoothness.
  2. Hsieh Tzung-Rue,TWX ; Lo Wen-Wei,TWX, Global planarization method for inter-layer-dielectric and inter-metal dielectric.
  3. Sun-Chieh Chien TW; De-Yuan Wu TW; Yung-Chung Lin TW, ILD planarization method.
  4. Haggart, Jr., David Weston; Glashauser, Walter, Method for determining an endpoint and semiconductor wafer.
  5. Suwa,Takahiro; Hattori,Kazuhiro; Okawa,Shuichi; Hibi,Mikiharu, Method for filling concave portions of concavo-convex pattern and method for manufacturing magnetic recording medium.
  6. Hsiao Hsi-Mao,TWX ; Wei Wen-Shan,TWX ; Kuo Ming-Sheng,TWX ; Yu H. C.,TWX, Method for forming an inter-layer dielectric layer.
  7. Lee, Sung-Kwon; Kim, Dong-Sauk; Park, Hyung-Soon; Lee, Ho-Seok; Kim, Sang-Ik, Method for forming contact plug of semiconductor device.
  8. Lee Sahng Kyoo,KRX, Method for forming interlayer insulating film of a semiconductor device.
  9. Kim, Jin-Hyun; Lee, In-Haeng, Method for manufacturing a semiconductor device.
  10. Ma Kin F. ; Stubbs Eric T., Method for reducing capactive coupling between conductive lines.
  11. Roche Gregory A. ; Hodul David T. ; Vahedi Vahid, Method for reduction of plasma charging damage during chemical vapor deposition.
  12. Inoue Yushi,JPX, Method of fabricating a wiring on a planarized surface.
  13. Jiang, Chun; Liu, Yowjuang Bill, Method of forming uniformly planarized structure in a semiconductor wafer.
  14. Yun-Hung Shen TW; Yu-Lun Lin TW, Method to reduce the metal TiN ARC damage in etching back process.
  15. Sciarrillo, Samuele, Methods for forming interconnections between top electrodes in memory cells by a two-step chemical-mechanical polishing (CMP) process.
  16. Juengling,Werner, Methods of forming integrated circuitry and methods of forming local interconnects.
  17. Tu Tuby,TWX ; Wu Chin-Ta,TWX ; Kuang-Chao Chen,TWX ; Huang Dinos,TWX, Process for intermetal SOG/SOP dielectric planarization.
  18. Fukushima, Yasumori; Takafuji, Yutaka; Moriguchi, Masao, Semiconductor device fabrication method and semiconductor device.
  19. Sambonsugi,Yasuhiro; Kokura,Hikaru, Semiconductor device manufacture method including process of implanting impurity into gate electrode independently from source /drain and semiconductor device manufactured by the method.
  20. Sambonsugi, Yasuhiro; Kokura, Hikaru, Semiconductor device manufacture method including process of implanting impurity into gate electrode independently from source/drain and semiconductor device manufactured by the method.
  21. Wang, Sung-Li; Chang, Chih-Sheng; Sun, Sey-Ping, Semiconductor devices, FinFET devices, and manufacturing methods thereof.
  22. Wang, Sung-Li; Chen, Neng-Kuo; Shih, Ding-Kang; Chang, Meng-Chun; Lin, Yi-An; Huang, Gin-Chen; Hsu, Chen-Feng; Lin, Hau-Yu; Ko, Chih-Hsin; Sun, Sey-Ping; Wann, Clement Hsingjen, Wrap-around contact.
  23. Wang, Sung-Li; Chen, Neng-Kuo; Shih, Ding-Kang; Chang, Meng-Chun; Lin, Yi-An; Huang, Gin-Chen; Hsu, Chen-Feng; Lin, Hau-Yu; Ko, Chih-Hsin; Sun, Sey-Ping; Wann, Clement Hsingjen, Wrap-around contact on FinFET.
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