초록 ▼

A high gain, low voltage differential amplifier exhibiting extremely low common mode sensitivities includes a load element exhibiting a high differential resistance, but a low common mode resistance. The load element contains a positive differential load resistance and a negative differential load r

A high gain, low voltage differential amplifier exhibiting extremely low common mode sensitivities includes a load element exhibiting a high differential resistance, but a low common mode resistance. The load element contains a positive differential load resistance and a negative differential load resistance, which offsets the positive differential load resistance. The output common mode level of the differential amplifier is one p-channel source to gate voltage drop below the power supply voltage prohibiting the common mode output voltage from drifting far from an active level. The differential amplifier also has application for use in a differential charge pump circuit. The high differential impedance of the differential amplifier allows the attainment of extremely small leakage, while a low common-mode impedance results in simplified biasing.

대표청구항 ▼

[ What is claimed is:] [10.] A differential charge pump circuit comprising:first and second transistors comprising a first terminal, a second terminal, and a third terminal for controlling an amount of current flowing from said first terminal to said second terminal, said third terminal on said firs

[ What is claimed is:] [10.] A differential charge pump circuit comprising:first and second transistors comprising a first terminal, a second terminal, and a third terminal for controlling an amount of current flowing from said first terminal to said second terminal, said third terminal on said first and second transistors receiving control signals;a current source having a biasing current and coupled to the second terminals of the first and second transistors;a load element comprising:a first circuit coupling power to said first terminal of said first transistor and to said first terminal of said second transistor, anda second circuit coupling power to said first terminal of said second transistor and to said first terminal of said first transistor; andat least one capacitor for generating a capacitance across said first terminal of said first transistor and said first terminal of said second transistor, wherein the first circuit has a positive differential resistance and the second circuit has a negative differential resistance for controlling leakage current of the at least one capacitor.