IPC분류정보
국가/구분 |
United States(US) Patent
등록
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국제특허분류(IPC7판) |
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출원번호 |
US-0460865
(2003-06-12)
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발명자
/ 주소 |
- Liu,Alan Barry
- Schweitzer,Marc O.
- Van Gogh,James Stephen
- Rosenstein,Michael
- Watia,Jennifer L.
- Zhang,Xinyu
- Tanaka,Yoichiro
- Forster,John C.
- Chen,Anthony
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출원인 / 주소 |
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대리인 / 주소 |
Konrad Raynes Victor &
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인용정보 |
피인용 횟수 :
8 인용 특허 :
21 |
초록
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In one embodiment, a target alignment surface disposed on a target support mechanically engages a darkspace shield alignment surface disposed on a darkspace shield as the target is lodged into a chamber body. The respective alignment surfaces are shaped and positioned so that the darkspace shield is
In one embodiment, a target alignment surface disposed on a target support mechanically engages a darkspace shield alignment surface disposed on a darkspace shield as the target is lodged into a chamber body. The respective alignment surfaces are shaped and positioned so that the darkspace shield is physically moved to a desired aligned position as the alignment surfaces engage each other. In this manner a darkspace shield may be directly aligned to a target within a semiconductor fabrication chamber to provide a suitable darkspace gap between the target and the darkspace shield.
대표청구항
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What is claimed is: 1. A semiconductor fabrication chamber, comprising: a chamber body; a target device having a target which has a sputterable target surface, said target device further having at least one target alignment surface and a target support supporting said target and target alignment su
What is claimed is: 1. A semiconductor fabrication chamber, comprising: a chamber body; a target device having a target which has a sputterable target surface, said target device further having at least one target alignment surface and a target support supporting said target and target alignment surface, said target device being movable between a first target position and a second target position with respect to said chamber body; and a darkspace shield positioned in said chamber body and movable between a first shield position and a second shield position with respect to said target, said darkspace shield having at least one darkspace shield alignment surface adapted to be engaged by said target alignment surface wherein said target alignment surface engages said darkspace shield alignment surface and moves said darkspace shield from said first shield position to said second shield position with respect to said target as said target moves from said first target position to said second target position with respect to said chamber body. 2. The semiconductor fabrication chamber of claim 1, further comprising: a plurality of darkspace shield alignment members, wherein each darkspace shield alignment member defines one of said darkspace shield alignment surfaces; and a plurality of target alignment members, wherein each target alignment member defines one of said target alignment surfaces. 3. The semiconductor fabrication chamber of claim 2 wherein said darkspace shield defines a center axis and said plurality of darkspace shield alignment members are equally spaced from each other and from said darkspace shield center axis. 4. The semiconductor fabrication chamber of claim 3 wherein said target defines a center and said plurality of target alignment members are equally spaced from each other and from said target center. 5. The semiconductor fabrication chamber of claim 4 wherein said darkspace shield center axis is aligned with said target center when said darkspace shield is moved to said second darkspace shield position. 6. The semiconductor fabrication chamber of claim 2 wherein said darkspace shield defines a center axis, said target defines a center and said darkspace shield center axis is aligned with said target center when said darkspace shield is moved to said second darkspace shield position. 7. The semiconductor fabrication chamber of claim 2, wherein each target alignment member is a pin and each darkspace shield alignment member is a bushing which defines a slot shaped to receive a pin. 8. The semiconductor fabrication chamber of claim 7 wherein said darkspace shield defines a center axis, said target defines a center and said darkspace shield center axis is aligned with said target center when said darkspace shield is moved to said second darkspace shield position and wherein each darkspace shield alignment member slot is radially aligned with respect to said darkspace shield center axis. 9. The semiconductor fabrication chamber of claim 7 wherein each darkspace shield alignment member has a recessed lip defining an entrance to said slot. 10. The semiconductor fabrication chamber of claim 2, wherein each darkspace shield alignment member is a pin and each target alignment member is a bushing which defines a slot shaped to receive a pin. 11. The semiconductor fabrication chamber of claim 2, wherein said darkspace shield alignment members are three in number and are circumferentially located on said darkspace shield, and wherein the target alignment members are three in number and are circumferentially located on said target support. 12. The semiconductor fabrication chamber of claim 1, further comprising a darkspace shield support member disposed within said chamber body and adapted to slidingly support said darkspace shield thereon, wherein said darkspace shield is adapted to slide on said darkspace shield support member as said darkspace shield moves between said first shield position and said second shield position. 13. The semiconductor fabrication chamber of claim 1, wherein said target support is a lid, said chamber further comprising a hinge rotatably connecting said lid to said chamber body, wherein said lid has an open orientation and a closed orientation relative to said chamber body, and wherein said target is in said first target position when said lid is in said open orientation, and wherein said target is in said second target position when said lid is in said closed orientation. 14. The semiconductor fabrication chamber of claim 1, wherein said darkspace shield extends circumferentially around said target and defines a darkspace gap between said target and said darkspace shield in said second shield position. 15. The semiconductor fabrication chamber of claim 1, wherein said darkspace shield expands and said darkspace shield alignment surface moves from a first thermally induced darkspace shield position to a second thermally induced darkspace shield position relative to said target as said shield is heated by operation of said chamber, and wherein at least one of said target alignment surface and said shield alignment surface is shaped to define an aperture of sufficient size to permit said shield alignment surface to move between said first and second thermally induced darkspace shield positions relative to said target unobstructed by said target alignment surface. 16. The semiconductor fabrication chamber of claim 7, wherein said darkspace shield is made of a material capable of expansion and contraction in response to a changes in temperature within said chamber, wherein said changes in temperature define a plurality of thermally induced positions for said darkspace shield, wherein each thermally induced position defines a darkspace gap between said darkspace shield and said target, wherein each slot is shaped to permit said shield to move between said thermally induced positions with a pin received in each slot. 17. The semiconductor fabrication chamber of claim 1, wherein said target is installed in said chamber body when said target is in second target position. 18. The semiconductor fabrication chamber of claim 1, wherein said darkspace shield is aligned with respect to said target when said shield is in said second shield position. 19. The semiconductor fabrication chamber of claim 1, wherein said sputterable target surface has a periphery and wherein said shield is aligned with respect to said target when said shield is in said second shield position and defines a darkspace gap around the entire periphery of said sputterable target surface when said target is installed in said chamber body. 20. A target device for a semiconductor fabrication chamber having a darkspace shield, comprising: a target having a sputterable target surface: and a target support electrically connected to said target and mechanically supporting said target, said target support having at least one alignment surface adapted to mechanically engage said darkspace shield to align said shield relative to said target, wherein said alignment surface is made of an electrically insulative material. 21. The target device of claim 20 wherein said alignment surface is slot-shaped. 22. A target device for a semiconductor fabrication chamber having a darkspace shield, comprising: a target having a disk-shaped sputterable target surface which defines a center; and an electrically conductive target support joined and electrically connected to said target and mechanically supporting said target, said target support having at least three pin-shaped alignment surfaces circumferentially located around said sputterable target surface and adapted to mechanically engage said darkspace shield to align said shield relative to said target, each pin being located equidistant from each other and said target surface center. 23. A darkspace shield device for a semiconductor fabrication chamber having a target device having a sputterable target surface, comprising: a darkspace shield having a ring-shaped shield wall adapted to surround said target sputtering surface and further having at least one alignment surface adapted to be mechanically engaged by said target device to align said shield relative to said target sputterable target surface, wherein said alignment surface is slot-shaped. 24. The shield device of claim 23 wherein said alignment surface is made of an electrically insulative material. 25. A darkspace shield device for a semiconductor fabrication chamber having a target device having a sputterable target surface, comprising: a darkspace shield having a ring-shaped shield wall defining a center axis and adapted to surround said target sputtering surface and further having at least three electrically insulative bushings circumferentially positioned around said shield wall, each bushing defining a slot-shaped alignment surface adapted to be mechanically engaged by said target device to align said shield relative to said target sputterable target surface, each slot shaped surface being aligned radially with respect to said shield center axis. 26. A method of aligning a darkspace shield to a target in a semiconductor fabrication chamber, comprising: placing said darkspace shield having a darkspace shield alignment surface in a first shield position in said chamber; and moving said target having a target alignment surface from a first target position to a second target position with respect to said chamber, wherein said target alignment surface engages said darkspace shield alignment surface and pushes said darkspace shield from said first shield position to a second shield position with respect to said target as said target moves from said first target position to said second target position, wherein said darkspace shield in the second shield position is aligned to said target in the second target position. 27. The method of claim 26, wherein said engaging further comprises inserting a plurality of alignments pins, each pin defining a target alignment surface, into a plurality of slotted insulated bushings, each bushing defining a darkspace shield alignment surface. 28. The method of claim 26, wherein said engaging further comprises inserting a plurality of alignments pins, each pin defining a darkspace shield alignment surface, into a plurality of slotted insulated bushings, each bushing defining a target alignment surface. 29. The method of claim 27, wherein said inserting includes inserting at least one of said alignment pins into at least one said slotted bushing, and subsequently, inserting at least one of said alignment pins into at least one said slotted bushing. 30. The method of claim 26, wherein moving said target from a first target position to a second target position with respect to said chamber includes rotating said target around a hinge connected to said chamber. 31. A method of aligning a darkspace shield to a target of a target device in a semiconductor fabrication chamber, comprising: placing said darkspace shield in a first shield position in said chamber wherein said shield includes a ring shaped member adapted to surround said target and having at least three bushings disposed around said ring shaped member, each bushing defining an electrically insulated alignment slot; and moving said target device from a first target position to a second target position with respect to said chamber to form a darkspace gap between said darkspace shield and said target, wherein said target has a disk-shaped sputtering surface and wherein said target device has at least three alignment pins disposed around said sputtering surface, each alignment pin entering an alignment slot and pushing said darkspace shield to a second shield position which is aligned with respect to said target as said target device is moved from said first target position to said second target position. 32. A semiconductor fabrication chamber, comprising: a chamber body defining an exterior, an interior and an opening in said chamber body between said chamber exterior and chamber interior; a removable chamber lid adapted to close said chamber body opening, said lid having a target which has a sputterable target surface, said lid further having at least one target alignment surface; a darkspace shield having at least one darkspace shield alignment surface adapted to be engaged by said target alignment surface; at least one fastener adapted to fasten said darkspace shield to said chamber lid; a plurality of darkspace shield alignment members, wherein each darkspace shield alignment member defines one of said darkspace shield alignment surfaces, wherein said darkspace shield defines a center axis and said plurality of darkspace shield alignment members are equally spaced from each other and from said darkspace shield center axis; and a plurality of target alignment members, wherein each target alignment member defines one of said target alignment surfaces. 33. The semiconductor fabrication chamber of claim 32 wherein said target defines a center and said plurality of target alignment members are equally spaced from each other and from said target center. 34. The semiconductor fabrication chamber of claim 33 wherein said darkspace shield center axis is aligned with said target center when said darkspace shield alignment surface is engaged by said target alignment surface. 35. The semiconductor fabrication chamber of claim 32 wherein each darkspace alignment member is a pin and each target alignment member is a bushing which defines a slot shaped to receive a pin. 36. A semiconductor fabrication chamber, comprising: a chamber body defining an exterior, an interior and an opening in said chamber body between said chamber exterior and chamber interior; a removable chamber lid adapted to close said chamber body opening, said lid having a target which has a sputterable target surface, said lid further having at least one target alignment surface; a darkspace shield having at least one darkspace shield alignment surface adapted to be engaged by said target alignment surface; and at least one fastener adapted to fasten said darkspace shield to said chamber lid; a plurality of darkspace shield alignment members, wherein each darkspace shield alignment member defines one of said darkspace shield alignment surfaces; and a plurality of target alignment members, wherein each target alignment member defines one of said target alignment surfaces, and wherein each target alignment member is a pin and each darkspace shield alignment member is a bushing which defines a slot shaped to receive a pin. 37. The semiconductor fabrication chamber of claim 36 wherein said darkspace shield defines a center axis, said target defines a center and said darkspace shield center axis is aligned with said target center when said darkspace shield alignment surface is engaged by said target alignment surface and wherein each darkspace shield alignment member slot is radially aligned with respect to said darkspace shield center axis. 38. The semiconductor fabrication chamber of claim 36 wherein each fastener includes a head member disposed on a pin and having a size sufficient to prevent passage of said head member though said slot. 39. The semiconductor fabrication chamber of claim 36, wherein said darkspace shield is made of a material capable of expansion and contraction in response to a changes in temperature within said chamber, wherein said changes in temperature define a plurality of thermally induced positions for said darkspace shield, wherein each thermally induced position defines a darkspace gap between said darkspace shield and said target, wherein each slot is shaped to permit said shield to move between said thermally induced positions with a pin received in each slot. 40. A semiconductor fabrication chamber, comprising: a chamber body defining an exterior, an interior and an opening in said chamber body between said chamber exterior and chamber interior; a removable chamber lid adapted to close said chamber body opening, said lid having a target which has a sputterable target surface, said lid further having at least one target alignment surface; a darkspace shield having at least one darkspace shield alignment surface adapted to be engaged by said target alignment surface; at least one fastener adapted to fasten said darkspace shield to said chamber lid; and a darkspace shield support member disposed within said chamber body and adapted to slidingly support said darkspace shield thereon, wherein said darkspace shield is adapted to slide on said darkspace shield support member as said darkspace shield moves in response to thermal expansion and contraction of said shield. 41. A semiconductor fabrication chamber, comprising: a chamber body defining an exterior, an interior and an opening in said chamber body between said chamber exterior and chamber interior: a removable chamber lid adapted to close said chamber body opening, said lid having a target which has a sputterable target surface, said lid further having at least one target alignment surface; a darkspace shield having at least one darkspace shield alignment surface adapted to be engaged by said target alignment surface: and at least one fastener adapted to fasten said darkspace shield to said chamber lid, wherein said darkspace shield expands and said darkspace shield alignment surface moves from a first thermally induced darkspace shield position to a second thermally induced darkspace shield position relative to said target as said shield is heated by operation of said chamber, and wherein at least one of said target alignment surface and said shield alignment surface is shaped to define an aperture of sufficient size to permit said shield alignment surface to move between said first and second thermally induced darkspace shield positions relative to said target unobstructed by said target alignment surface. 42. An assembly for a semiconductor fabrication chamber, comprising: a target having a sputterable target surface; a target support electrically connected to said target and mechanically supporting said target, said target support having at least one target alignment surface; and a darkspace shield having a ring-shaped shield wall adapted to surround said target sputtering surface and further having at least one alignment surface adapted to be mechanically engaged by said target alignment surface to align said shield relative to said target sputterable target surface, wherein said target alignment surface is made of an electrically insulative material. 43. The assembly of claim 42 wherein said target alignment surface is slot-shaped. 44. The assembly of claim 42 wherein said shield alignment surface is made of an electrically insulative material. 45. The assembly of claim 42 wherein said shield alignment surface is slot-shaped. 46. A method of aligning a darkspace shield to a target in a semiconductor fabrication chamber, comprising: fastening a darkspace shield having a darkspace shield alignment surface to a target support supporting a target, said support having a target alignment surface which engages said darkspace shield alignment surface and aligns said darkspace shield with respect to said target; and moving said target support from a first target support position to a second target support position so that said target and said darkspace shield fastened to said target support are installed in said chamber, wherein said fastening further comprises inserting a plurality of alignment pins, each pin defining a target alignment surface, into a plurality of slotted insulated bushings, each bushing defining a darkspace shield alignment surface. 47. A method of aligning a darkspace shield to a target in a semiconductor fabrication chamber, comprising: fastening a darkspace shield having a darkspace shield alignment surface to a target support supporting a target, said support having a target alignment surface which engages said darkspace shield alignment surface and aligns said darkspace shield with respect to said target; and moving said target support from a first target support position to a second target support position so that said target and said darkspace shield fastened to said target support are installed in said chamber, wherein said fastening further comprises inserting a plurality of alignment pins, each pin defining a darkspace alignment surface, into a plurality of slotted insulated bushings, each bushing defining a target alignment surface.
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