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Metal-insulator-metal (MIM) capacitor 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/48
출원번호 US-0365922 (2006-03-02)
등록번호 US-7329955 (2008-02-12)
발명자 / 주소
  • Tsau,Liming
출원인 / 주소
  • Broadcom Corporation
대리인 / 주소
    Sterne, Kessler, Goldstein & Fox P.L.L.C.
인용정보 피인용 횟수 : 8  인용 특허 : 29

초록

A metal-insulator-metal (MIM) capacitor is made according to a copper dual-damascene process. A first copper or copper alloy metal layer if formed on a substrate. A portion of the first metal layer is utilized as the lower plate of the MIM capacitor. An etch stop dielectric layer is used during etch

대표청구항

What is claimed is: 1. A metal-insulator-metal (MIM) capacitor, comprising: a first metal layer comprising copper or copper alloy directly in contact with a dielectric layer, wherein a portion of the first metal layer is utilized as a lower plate of the MIM capacitor; an etch stop layer directly in

이 특허에 인용된 특허 (29)

  1. Robert M. Geffken ; Anthony K. Stamper, Buried metal dual damascene plate capacitor.
  2. Matsuhashi, Hideaki, Capacitor and a manufacturing process therefor.
  3. Stephen Downey ; Edward Harris ; Sailesh Merchant, Capacitor for integration with copper damascene processes.
  4. Gambino Jeffrey P. ; Narayan Chandrasekhar ; Kirihata Toshiaki, Conductor-insulator-conductor structure.
  5. Ling-Hsu Tseng TW; Der-Yuan Wu TW, Copper interconnections for metal-insulator-metal capacitor in mixed mode signal process.
  6. Ma Ssu-Pin,TWX ; Chen Chun-Hon,TWX ; Yeh Ta-Hsun,TWX ; Peng Kuo-Reay,TWX ; Hsu Heng-Ming,TWX ; Thei Kong-Beng,TWX ; Chou Chi-Wu,TWX ; Ho Yen-Shih,TWX, Copper process compatible CMOS metal-insulator-metal capacitor structure and its process flow.
  7. Lin Tony,TWX ; Huang Yimin,TWX ; Yew Tri-Rung,TWX, Dual damascence process.
  8. Tsau, Liming, High density metal capacitor using via etch stopping layer as field dielectric in dual-damascence interconnect process.
  9. Alers Glenn B. ; Choi Seungmoo ; Merchant Sailesh Mansinh ; Roy Pradip Kumar, Integrated circuit device having dual damascene capacitor.
  10. Yang, Sam; Agarwal, Vishnu K., Metal oxynitride capacitor barrier layer.
  11. Jun Young Kwon,KRX ; Kim Yong Kwon,KRX ; Park Jin-Won,KRX ; Park Nae-Hak,KRX, Method for fabricating wiring in semiconductor device.
  12. Park, Dong Su; Ahn, Byoung Kwon, Method for manufacturing a capacitor for semiconductor devices.
  13. Kuo-Tai Huang TW; Wen-Yi Hsieh TW; Tri-Rung Yew TW, Method of fabricating DRAM capacitor.
  14. Hsia Liang-Choo,TWX ; Wu H. J.,TWX, Method of fabricating embedded dynamic random access memory.
  15. Erh-Kun Lai TW; Shyi-Shuh Pan TW; Chien-Hung Liu TW; Shou-Wei Huang TW; Ying-Tso Chen TW, Method of forming a MIM capacitor.
  16. Lee Hyae-Ryoung,KRX ; Yu Sun-Il,KRX ; Kim Dong-Woo,KRX, Method of forming integrated circuit capacitors having electrodes therein that comprise conductive plugs.
  17. Richard H. Lane, Method of forming noble metal pattern.
  18. Chun-Yung Sung ; Allen Yen, Method of making dual damascene interconnect structure and metal electrode capacitor.
  19. Matsuhashi, Hideaki, Method of manufacturing a capacitor with copper electrodes and diffusion barriers.
  20. Lee, Kee Jeung; Yang, Hong Seon, Method of manufacturing capacitor of semiconductor device using an amorphous TaON.
  21. Jang Syun-Ming,TWX ; Fu Chu-Yan,TWX ; Chiu Yuan-Hung,TWX, Method to reduce silicon oxynitride etch rate in a silicon oxide dry etch.
  22. Lee, Hyae-Ryoung; Yu, Sun-Il; Kim, Dong-Woo, Methods of forming integrated circuit capacitors having electrodes therein that comprise conductive plugs.
  23. Dubin Valery ; Ting Chiu ; Cheung Robin W., Pulse electroplating copper or copper alloys.
  24. Henry Chung TW, Self-aligned metal-insulator-metal capacitor for integrated circuits.
  25. Uchiyama, Yuji; Suzuki, Toshiya; Tsukune, Atsuhiro; Sukegawa, Takae, Semiconductor device and method of manufacturing the same.
  26. Takashi Sakoh JP, Semiconductor device including capacitive element of an analog circuit.
  27. Parikh Suketu A., Techniques for triple and quadruple damascene fabrication.
  28. Roy Arjun Kar, Thin-film capacitors and methods for forming the same.
  29. Lemnios Zachary J. (710 Wuthering Heights Dr. Colorado Springs CO 80921) McIntyre David G. (5424 Del Rey Colorado Springs CO 80918) Lau Chung-Lim (270 Rimview Dr. ; #1 Colorado Springs CO 80919) Will, Three metal personalization of application specific monolithic microwave integrated circuit.

이 특허를 인용한 특허 (8)

  1. Park, Byeongju; Iyer, Subramanian S.; Kothandaraman, Chandrasekharan, Antifuse structure having an integrated heating element.
  2. Basker, Veeraraghavan S.; Cheng, Kangguo; Standaert, Theodorus E.; Wang, Junli, Integrating metal-insulator-metal capacitors with air gap process flow.
  3. Zang, Hui; Chi, Min-hwa, Metal-insulator-metal capacitor and methods of fabrication.
  4. Hsu, Chien En, Metal-metal capacitor and method of making the same.
  5. Coolbaugh,Douglas D.; Dalton,Timothy J.; Eshun,Ebenezer; McGahay,Vincent J.; Stamper,Anthony K.; Vaed,Kunal, Method and structure for integrating MIM capacitors within dual damascene processing techniques.
  6. Cho, Hsiu-Ying, Planar interdigitated capacitor structures and methods of forming the same.
  7. Takewaki, Toshiyuki; Watanabe, Mari, Semiconductor device having a refractory metal containing film and method for manufacturing the same.
  8. Takewaki, Toshiyuki; Watanabe, Mari, Semiconductor device having a refractory metal containing film and method for manufacturing the same.
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