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Temperature-Dependent Instabilities of DC characteristics in AlGaN/GaN-on-Si Heterojunction Field Effect Transistors 원문보기

Journal of semiconductor technology and science, v.14 no.5, 2014년, pp.682 - 687  

Keum, Dong-Min (School of Electronic and Electrical Engineering, Hongik University) ,  Choi, Shinhyuk (School of Electronic and Electrical Engineering, Hongik University) ,  Kang, Youngjin (School of Electronic and Electrical Engineering, Hongik University) ,  Lee, Jae-Gil (School of Electronic and Electrical Engineering, Hongik University) ,  Cha, Ho-Young (School of Electronic and Electrical Engineering, Hongik University) ,  Kim, Hyungtak (School of Electronic and Electrical Engineering, Hongik University)

Abstract AI-Helper 아이콘AI-Helper

We have performed reverse gate bias stress tests on AlGaN/GaN-on-Si Heterostructure FETs (HFETs). The shift of threshold voltage ($V_{th}$) and the reduction of on-current were observed from the stressed devices. These changes of the device parameters were not permanent. We investigated t...

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제안 방법

  • We performed the stress tests at elevated baseline temperatures of 60, 80, 100, and 120 ℃, respectively, to investigate the temperature dependence of the instabilities observed from the previous reverse gate bias stress. The tested devices had the same physical dimensions and were selected in the vicinity of the first stressed device at a room temperature to minimize the process-related variance. Similarly to the stress test at a room temperature, the gradual increase of the gate leakage current was observed.
  • The stressed devices showed temporary instabilities including the shift of Vth and the reduction of the on-current. We analyzed the temperature dependence of the parameter changes and performed TCAD simulation to investigate the main mechanism of the observed instabilities.
  • We carried out TCAD simulation using ATLAS SILVACO to validate the effect of the electron trapping. In the beginning, the simulation was calibrated to regenerate the measured data of the fresh device.

대상 데이터

  • 1. Cross-sectional structure of the fabricated AlGaN/GaN-on-Si HFET.
  • The epitaxial structure consisted of a 1.25 nm undoped GaN capping layer, a 20 nm undoped-Al0.25Ga0.75N barrier, and a 3~4 μm undoped-GaN buffer layer on n-type Si (111) substrate.
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참고문헌 (20)

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  5. M. W. Ha, et al, "AlGaN/GaN High-Electron-Mobility Transistor Employing an Additional Gate for High-Voltage Switching Applications," Jpn. J. Appl. Phys., vol.44, no.9A, pp.6385-6388, Sep., 2005. 

  6. W. Saito, et al, "High Breakdown Voltage AlGaNGaN Power-HEMT Design and High Current Density Switching Behavior," IEEE trans. Electron Devices, vol.50, no.12, pp.2528-2531, Dec., 2003. 

  7. J.A. Alamo and J. W. Joh, "GaN HEMT reliability," Microelectron. Reliab., vol.49, nos.9-11, pp.1200-1206, Sep.-Nov., 2009. 

  8. G. Meneghesso, et al, "Reliability of GaN High-Electron-Mobility Transistors : State of the art and Perspectives," IEEE Trans. Device Mater. Rel., vol.8, no.2, pp.332-343, Jun., 2008. 

  9. Jae-Gil Lee, et al, "State-of-the-Art AlGaN/GaNon-Si Heterojunction Field Effect Transistors with Dual Field Plates," Appl. Phys. Express, vol.5, no.6, 066502, Jun., 2012. 

  10. J. S. Lee, et al, "Postprocessing annealing effects on direct current and microwave performance of AlGaN/GaN high electron mobility transistors," Appl. Phys. Lett., vol.85, no.13, pp.2631-2633, Jul., 2004. 

  11. N. Miura, et al, "Thermal annealing effects on Ni/Au based Schottky contacts on n-GaN and AlGaN/GaN with insertion of high work function metal," Solid-State Electron., vol.48, no.5, pp.689-695, May, 2004. 

  12. J. W. Joh and J. A. Alamo, "Mechanisms for Electrical Degradation of GaN High-Electron Mobility Transistors," Electron Devices Meeting, 2006. IEDM '06. International, 11-13, pp.1-4, Dec., 2006. 

  13. J. Jimenez and U. Chowdhury, "X-band GaN FET reliability," Reliability Physics Symposium, 2008. IRPS 2008. IEEE International, 30-1, pp.429-435, Apr.-May., 2008. 

  14. E. Zanoni, et al, "Localized Damage in AlGaN/GaN HEMTs Induced by Reverse-Bias Testing," IEEE Electron Device Lett., vol.30, no.5, pp.427-429, May., 2009. 

  15. S. H. Choi, et al, "Degradation characteristics of high-voltage AlGaN/GaN-on-Si heterostructure FETs under a reverse gate bias stress," J. Korean Phys. Soc., vol.63, no.6, pp.1208-1212, Sep., 2013. 

  16. A. Sozza, et al, "Evidence of traps creation in GaN/AlGaN/GaN HEMTs after a 3000 hour onstate and off-state hot-electron stress," Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International, 5-7, pp.590-593, Dec., 2005. 

  17. H. T. Kim, et al, "Effects of SiN passivation and high-electric field on AlGaN-GaN HFET degradation," IEEE Electron Device Lett., vol.24, no.7, pp.421-423, Jul., 2003. 

  18. M. Tapajna, et al, "Integrated Optical and Electrical Analysis: Identifying Location and Properties of Traps in AlGaN/GaN HEMTs During Electrical Stress," IEEE Electron Device Lett., vol.31, no.7, pp.662-664, Jul., 2010. 

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  20. G. A. Umana-Membreno, et al, "Low-temperature shallow-trap related output-admittance frequency dispersion in AlGaN/GaN MODFETs," Optoelectronic and Microelectronic Materials Devices, 1998. Proceedings. 1998 Conference on, 14-16, pp.252-255, Dec., 1998. 

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