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Korean chemical engineering research = 화학공학, v.54 no.6, 2016년, pp.723 - 733
김회철 (서울대학교 화학생물공학부) , 김재정 (서울대학교 화학생물공학부)
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Intensive researches have been focused on the 3-dimensional packaging technology using through silicon via (TSV) to overcome the limitation in Cu interconnection scaling. Void-free filling of TSV by the Cu electrodeposition is required for the fabrication of reliable electronic devices. It is genera...
| 핵심어 | 질문 | 논문에서 추출한 답변 |
|---|---|---|
| 와이어 본딩이란? | 가장 주목받고 있는 연구로는 와이어 본딩(wire bonding)과 실리콘 관통 비아(through silicon via)를 이용한 기술이 있다. 와이어 본딩은 금(Au) 또는 구리로 구성된 와이어를 사용하여 칩(chip)과 외부를 연결하는 기술로, 와이어 형성을위한 여유 공간이 필요하고 신호 전달거리가 길다는 한계를 갖는다[3]. TSV는 실리콘 웨이퍼(wafer)를 관통하여 형성된 깊이 약 50 μm 이상의 비아(via)로, Fig. | |
| 구리의 특징은? | 구리(Cu)는 1.67 μΩ·cm의 낮은 비저항을 가지고 있어 전자 소자에서의 우수한 신호 전달 속도를 보이고, 높은 일렉트로마이그레이션(electromigration) 저항을 바탕으로 소자의 신뢰성을 확보하기에 적합한 물질이다[1]. 특히 다마신(damascene) 공정을 통해 미세 배선의 다층화가 가능하여 현재 반도체 배선 공정의 주 금속 물질로 사용되고 있다. | |
| 구리의 특성을 이용한 공정은 무엇이고 어디에 사용되는가? | 67 μΩ·cm의 낮은 비저항을 가지고 있어 전자 소자에서의 우수한 신호 전달 속도를 보이고, 높은 일렉트로마이그레이션(electromigration) 저항을 바탕으로 소자의 신뢰성을 확보하기에 적합한 물질이다[1]. 특히 다마신(damascene) 공정을 통해 미세 배선의 다층화가 가능하여 현재 반도체 배선 공정의 주 금속 물질로 사용되고 있다. 소자의 성능 향상을 위해서, 다층 배선의 형성과 동시에 배선의 폭을 감소하여 소자의 직접도를 높이는 연구가 요구된다. |
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