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Advanced On-chip SOL Calibration Method for Unknown Fixture De-embedding 원문보기

Journal of semiconductor technology and science, v.17 no.4, 2017년, pp.543 - 551  

Yoon, Changwook (Intel Corporation) ,  Chen, Bichen (EMC Laboratory, Missouri University of Science and Technology) ,  Ye, Xiaoning (Intel Corporation) ,  Fan, Jun (EMC Laboratory, Missouri University of Science and Technology)

Abstract ▼ AI-Helper 아이콘AI-Helper

SOL (Short, Open and Load) calibration based on iterative error sensitivity is proposed in this paper. With advanced SOL calibration, unknown parasitic parameters at on-chip terminations are accurately estimated up to 20 GHz. Artificial terminations are designed on printed circuit board (PCB) to exp...

주제어

#SOL calibration   #iterative error sensitivity   #de-embedding  

AI 본문요약
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제안 방법

  • A quantitative error area is adopted to find out optimization point and verified with known SOL calibration kit. Also, the proposed method is validated with customized SOL calibration kit on PCB and applied to on-chip SOL terminations. With proposed iterative error procedure, on-chip fixture S-parameter is successfully calibrated.
  • Through fabricated manual calibration kit, all parasitic can be estimated and each parameter is validated with TDR. Finally, the proposed calibration method is applied to remove errors from parasitic values and characterize onchip fixtures.
  • This chapter introduces an iterative method to find out all unknown parasitic parameters and minimize the error sensitivity. The proposed method basically adopts an error minimization between two S-parameters from the measurement and the estimation as shown in Fig. 2.
  • However, there is no way to find out accurate parasitic parameters for artificial calibration kit. This chapter introduces an iterative method to find out all unknown parasitic parameters and minimize the error sensitivity. The proposed method basically adopts an error minimization between two S-parameters from the measurement and the estimation as shown in Fig.
  • This paper analyzes the error amplification from small variation at each termination and proposes an advanced SOLT calibration method using iterative error sensitivity. In addition, the iterative error procedure make an easy way to find out correct parasitic values.
  • Proposed procedure uses an error level between original Sparameter and calculated S-parameter and tunes parasitic to minimize this error level. To validate proposed iterative procedure with experimental measurement, artificial SHORT, OPEN, LOAD terminations and THRU line are fabricated on PCB and on-chip. Through fabricated manual calibration kit, all parasitic can be estimated and each parameter is validated with TDR.

이론/모형

  • In LOAD model, attached resistor is assumed as an ideal 50ohm and via resistor is also neglected. THRU is used for the direct 2x-fixture measurement for the validation of de-embedding accuracy after proposed calibration method.
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참고문헌 (10)

  1. Dylan F. Williams et al, "An Optimal Vector-Network-Analyzer Calibration Algorithm," IEEE Trans. Microwave Theory and Techniques, vol.51, pp2391-2401, Dec. 2003 

    상세보기 crossref

  2. F. Purroy and L. Pradell, "New theoretical analysis of the LRRM calibration technique for vector network analyzers," IEEE Trans. Instrumentation and Measurement, vol.50, pp1307-1314, Oct. 2001 

    상세보기 crossref

  3. I. Rolfes and B. Schiek, "LRR-a self-calibration technique for the calibration of vector network analyzers," IEEE Trans. Instrumentation and Measurement, vol.52, pp316-319, Apr. 2003 

    상세보기 crossref

  4. Jeffrey A. Jargon et al, "Robust SOLT and Alternative Calibrations for Four-Sampler Vector Network Analyzers," IEEE Trans. Microwave Theory and Techniques, vol.47, pp1999-2013, Oct. 1999 

  5. Michael Hiebel, "Measurement Accuracy and Calibration," in Fundamental of Vector Network Analysis, 5th ed., Germany, Rohde & Schwarz, 2011, pp. 109-131 

  6. Ulrich Stumper et al, "Influence of Different Configurations of Nonideal Calibration Standards on Vector Network Analyzer Performance," IEEE Trans. Instrumentation and Measurement, vol.61, pp2034-2041, Jun, 2012 

    상세보기 crossref

  7. Wei Zhao et al, "Uncertainties of Multiport VNA S-Parameter Measurements Applying the GSOLT Calibration Method," IEEE Trans. Instrumentation and Measurement, vol.61, pp3251-3258, Aug. 2012 

    상세보기 crossref

  8. N. Otegi et al, "Receiver noise calibration for a vector network analyzer," in Proc. ARFTG, Nov. 2010, pp1-5 

  9. J. Stenarson et al, "A new assessment method for the residual errors in SOLT and SOLR calibrated VNAs," in Proc. ARFTG, Jun. 2006, pp1-6 

  10. Shang Zanyu et al, "A novel algorithm for detecting the operating state of a calibrated two-port vector network analyzer," in Proc. ICMIC, Aug. 2013, Vol.1, pp124-127 

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