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3D 칩 적층을 위한 하이브리드 본딩의 최근 기술 동향
Recent Progress of Hybrid Bonding and Packaging Technology for 3D Chip Integration 원문보기

반도체디스플레이기술학회지 = Journal of the semiconductor & display technology, v.22 no.4, 2023년, pp.38 - 47  

정철화 (서울시립대학교 지능형반도체학과) ,  정재필 (서울시립대학교 신소재공학과)

Abstract ▼ AI-Helper 아이콘AI-Helper

Three dimensional (3D) packaging is a next-generation packaging technology that vertically stacks chips such as memory devices. The necessity of 3D packaging is driven by the increasing demand for smaller, high-performance electronic devices (HPC, AI, HBM). Also, it facilitates innovative applicatio...

주제어

#3D packaging   #Hybrid bonding   #Micro bumps   #Chip integration  

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