[논문]Performance Analysis of Fully Depleted SOI (FD-SOI) MOSFET Incorporating Dielectric Engineering

Kumar, Prashant; Vashishath, Munish; Gupta, Neeraj; Gupta, Rashmi

doi:10.1088/1757-899x/1228/1/012021

Performance Analysis of Fully Depleted SOI (FD-SOI) MOSFET Incorporating Dielectric Engineering 원문보기

IOP conference series. Materials science and engineering, v.1228 no.1, 2022년, pp.012021 -

Kumar, Prashant , Vashishath, Munish , Gupta, Neeraj , Gupta, Rashmi

Abstract ▼ AI-Helper

AbstractThis paper presents an efficacy of an FD SOI MOSFET structure in suppressing short channel effects is investigated through 2-Dimenional simulation on ATLAS Silvaco. The electrical comparison between Bulk MOSFET, FD-SOI MOSFET and FD-SOI MOSFET using high-k gate dielectric at 45nm technology has been carried out. The structures have been designed and study of threshold voltage, sub threshold slope, drain current (Ion), leakage current (Ioff), Ion/Ioff, transconductance has been done. The features offered by the new device structure are found to be better than the conventional bulk MOSFET. Aluminum Oxide (Al2O3) has been compared to SiO2 as dielectric material. As the dielectric constant of the materials increased, there is a reduction in the leakage current. It provides higher transconductance and better subthreshold slope, thus resulting in improvement of the device. A comparative analysis has been carried out among bulk MOSFET and SOI MOSFET using aluminum oxide, silicon oxide and silicon nitride as gate dielectric materials. Aluminum Oxide also provides higher drain current as compared to other dielectric materials presented in the paper. Thus, Aluminum Oxide is a good candidate as a dielectric for the future devices as compared to traditional oxides. The proposed device can be useful for low power applications.

참고문헌 (14)

Kumar 12 2013
IEEE Trans. Electron Devices Suzuki 43 1166 1996 10.1109/16.502429 Analytical threshold voltage model for short channel double-gate SOI MOSFETs

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IEEE Trans. Electron Devices Taur 48 2861 2001 10.1109/16.974719 Analytic solutions of charge and capacitance in symmetric and asymmetric double-gate MOSFETs

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Gupta 53 2015
Superlattices and Microstructures Journal Rewari 90 8 2016 10.1016/j.spmi.2015.11.026 Numerical Modeling of Subthreshold Region of Junctionless Double Surrounding Gate MOSFET (JDSG)

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Journal of Engineering Science and Technology Gupta 13 2018 Performance and a new 2-D analytical modeling of a Dual-Halo Dual-Dielectric Triple-Material Surrounding-Gate-All-Around (DH-DD-TM-SGAA) MOSFET
International Journal of Engineering Gupta 31 2018 An accurate 2D Analytical Model for Transconductance-to-Drain Current ratio (gm/Id) for a Dual-Halo Dual-Dielectric Triple-Material Cylindrical-Gate-All-Around (DH-DD-TM-CGAA) MOSFETs
Journal of Semiconductor Technology and Science Gupta 20 1 2020 Performance investigation of Dual-Halo Dual-Dielectric Triple Material Surrounding Gate MOSFET with High-K dielectrics for Low Power Applications
Gupta 2016
Journal of Semiconductor Technology and Science Balamurugan 8 221 2008 10.5573/JSTS.2008.8.3.221 An Analytical Modeling of Threshold and Subthreshold Swing on Dual Material Surrounding Gate Nanoscale MOSFETs for high speed Wireless Communication

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Superlattices and microstructures verma 88 354 2015 10.1016/j.spmi.2015.09.024 Modeling and simulation of subthreshold behavior of cylindrical surrounding double gate MOSFET for enhanced electrostatic integrity

상세보기
Silicon Kumar 13 1 2021 Subthreshold Current Modeling of Stacked Dielectric Triple Material Cylindrical Gate All Around (SD-TM-CGAA) Junctionless MOSFET for Low Power Applications
Advances in Electrical and Electronics Engineering Gupta 19 66 2021 10.15598/aeee.v19i1.3788 Elicitation of Scattering Parameters of Dual-halo Dual-dielectric Triple-material Surrounding Gate (DH-DD-TM-SG) MOSFET for Microwave Frequency Applications

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2015

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Performance Analysis of Fully Depleted SOI (FD-SOI) MOSFET Incorporating Dielectric Engineering 원문보기

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