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NTIS 바로가기IEICE Electronics Express, v.8 no.16, 2011년, pp.1343 - 1347
Choi, SungWook (Flash Design Team I, Flash Development Division, Hynix Semiconductor Inc.) , Kim, DuckJu (Flash Design Team I, Flash Development Division, Hynix Semiconductor Inc.) , Chung, JunSeob (Flash Design Team I, Flash Development Division, Hynix Semiconductor Inc.) , Han, BongSeok (Flash Design Team I, Flash Development Division, Hynix Semiconductor Inc.) , Park, JeaGun (Nano SOI Process Laboratory, Room #101, HIT, Hanyang University)
In this paper, power efficiency optimization scheme of charge pump circuit in NAND FLASH memory was proposed. The proposed scheme was implemented in program/erase charge pump by pump stage number control method. The maximum power efficiency of this pump is about 30%, and the maximum point is around ...
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[3] J. E. Brewer and M. Gill, “Nonvolatile Memory Technologies with Emphasis on FLASH,” WILEY INTER-SCIENCE , pp. 119-122.
[4] E. Bayer and H. Schmeller, “A High Efficiency Single-Cell Cascaded Charge Pump Topology - The Competitive Alternative to Inductive Boost Converters,” Power electronics Specialists Conf. , vol. 1, pp. 290-295, June 2001.
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