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Microelectronics journal, v.64, 2017년, pp.9 - 18
Bagheri-Soulla, A.A. , Ghaznavi-Ghoushchi, M.B.
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RRAM is an emerging technology with vast applications in computation and storage. RRAM with MLC capabilities is more interesting owing to its higher storage density. In this study, we proposed an approach for RRAM-based MLC design. The approach starts with capacitor-based quantization of electric ch...
Nature Strukov 453 80 2008 10.1038/nature06932 The missing memristor found
IEEE J. Emerg. Sel. Top. Circuits Syst., Meng-Fan 5 183 2015 10.1109/JETCAS.2015.2426531 Challenges and circuit techniques for energy-efficient on-chip nonvolatile memory using memristive devices
Kurinec 2013 Nanoscale Semiconductor Memories: Technology and Applications
IEEE Trans. on Nucl. Sci. Rui 62 2294 2015 10.1109/TNS.2015.2465164 Investigation of single-bit and multiple-bit Upsets in oxide RRAM-based 1T1R and crossbar memory arrays
Appl. Phys. Lett. Prakash 106 233104 2015 10.1063/1.4922446 Resistance controllability and variability improvement in a TaOx-based resistive memory for multilevel storage application
10.1109/ISNE.2015.7132027 A. Prakash, J.S. Park, J. Song, S.J. Lim, J.H. Park, J. Woo, , et al., Multi-state resistance switching and variability analysis of HfOx based RRAM for ultra-high density memory applications, in: International Symposium on Next-Generation Electronics (ISNE), pp. 1-2, 2015.
Appl. Phys. Lett. Yang 102 043502 2013 10.1063/1.4790158 Demonstration and modeling of multi-bit resistance random access memory
IEEE Trans. on Electron Devices Guan 59 1172 2012 10.1109/TED.2012.2184545 On the switching parameter variation of metal-oxide RRAM-Part I: physical modeling and simulation methodology
L. Nianduan, L. Ling, S. Pengxiao, W. Ming, L. Qi, L. Hangbing, , et al., A novel approach to identify the carrier transport path and its correlation to the current variation in RRAM, in: (IMW) IEEE International Memory Workshop, 2015, pp. 1-4.
IEEE Trans. on Electron Devices Wanki 61 2158 2014 10.1109/TED.2014.2319074 Current conduction mechanism of nitrogen-doped AlOx RRAM
Electron Device Lett., IEEE Prakash 36 32 2015 10.1109/LED.2014.2375200 Demonstration of low power 3-bit multilevel cell characteristics in a TaOx-based RRAM by stack engineering
L. Seung Ryul, K. Young-Bae, C. Man, K. Kyung Min, L. Chang Bum, H. Ji Hyun, et al., Multi-level switching of triple-layered TaOx RRAM with excellent reliability for storage class memory, in: Symposium on VLSI Technology (VLSIT), 2012, pp. 71-72.
Very Large Scale IEEE Trans. on Integr. (VLSI) Syst. Patel 23 1750 2015 10.1109/TVLSI.2014.2347926 Multistate register based on resistive RAM
Very Large Scale IEEE Trans. on Integr. (VLSI) Syst. Zangeneh 22 1815 2014 10.1109/TVLSI.2013.2277715 Design and optimization of nonvolatile multibit 1T1R resistive RAM
IEEE Electron Device Lett. Guan 33 1405 2012 10.1109/LED.2012.2210856 A SPICE compact model of metal oxide resistive switching memory with variations
IEEE Electron Device Lett. Haitong 35 211 2014 10.1109/LED.2013.2293354 A SPICE model of resistive random access memory for large-scale memory array simulation
IEEE Proc. Wong 100 1951 2012 Metal-oxide RRAM
10.7873/DATE.2015.0362 H. Li, Z. Jiang, P. Huang, Y. Wu, H.Y. Chen, B. Gao, , et al., Variation-aware, reliability-emphasized design and optimization of RRAM using SPICE model, in: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015, pp. 1425-1430.
Procedia Comput. Sci. Merrikh-Bayat 3 128 2011 10.1016/j.procs.2010.12.022 Memristor-based circuits for performing basic arithmetic operations
Microelectron. J. Bagheri-Soulla 55 53 2016 10.1016/j.mejo.2016.06.010 Memristor based circuit design using charge and attached capacitor
Yoo 2003 A TIQ Based CMOS Flash A/D Converter for System-on-chip Applications
Circuit Theory, IEEE Trans. on Chua 18 507 1971 10.1109/TCT.1971.1083337 Memristor-the missing circuit element
Radioengineering Leon 24 319 2015 10.13164/re.2015.0319 Everything you wish to know about memristors but are afraid to ask
10.1007/978-3-319-02630-5_19 O. Kavehei, E. Skafidas, K. Eshraghian, Memristive in situ computing, in: Memristor Networks, ed: Springer, 2014, pp. 413-428.
Mott 1940 Electronic Processes in Ionic Crystals
J. Appl. Phys. Hickmott 33 2669 1962 10.1063/1.1702530 Lowfrequency negative resistance in thin anodic oxide films
Solid-State Electron. Gibbons 7 785 1964 10.1016/0038-1101(64)90131-5 Switching properties of thin NiO films
Appl. Phys. Lett. Seo 85 5655 2004 10.1063/1.1831560 Reproducible resistance switching in polycrystalline NiO films
Appl. Phys. Lett. Rohde 86 2907 2005 10.1063/1.1968416 Identification of a determining parameter for resistive switching of TiO2 thin films
I. Baek, M. Lee, S. Seo, M. Lee, D. Seo, D.-.S. Suh, et al., Highly scalable nonvolatile resistive memory using simple binary oxide driven by asymmetric unipolar voltage pulses, in: IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004, pp. 587-590.
Appl. Phys. Lett. Son 92 2106 2008 10.1063/1.2931087 Direct observation of conducting filaments on resistive switching of NiO thin films
J. Appl. Phys. Bersuker 110 124518 2011 10.1063/1.3671565 Metal oxide resistive memory switching mechanism based on conductive filament properties
IEEE Trans. on Comput. Rich C-35 99 1986 10.1109/TC.1986.1676727 A survey of multivalued memories
IEEE Trans. on Electron Devices Jen-Chieh 62 2510 2015 10.1109/TED.2015.2444663 Categorization of multilevel-cell storage-ClassMemory: an RRAM example
Chin. Phys. B Xu-Dong 21 098901 2012 10.1088/1674-1056/21/9/098901 SPICE modeling of memristors with multilevel resistance states
K. Hyongsuk, M.P. Sah, Y. Changju, L.O. Chua, Memristor-based multilevel memory, in: Proceedings of the 12th International Workshop on Cellular Nanoscale Networks and Their Applications (CNNA), 2010, pp. 1-6.
ECS Solid State Lett. Misha 4 P25 2015 10.1149/2.0011504ssl Effect of nitrogen doping on variability of TaOx-RRAM for low-power 3-Bit MLC applications
IEEE Electron Device Lett. Puglisi 36 1030 2015 10.1109/LED.2015.2464256 A novel program-verify algorithm for multi-bit operation in HfO2 RRAM
L. Zhao, H.Y. Chen, S.C. Wu, Z. Jiang, S. Yu, T.H. Hou, , et al., Improved multi-level control of RRAM using pulse-train programming, in: Proceedings of Technical Program International Symposium on VLSI Technology, Systems and Application (VLSI-TSA), 2014, pp. 1-2.
10.1109/VLSI-TSA.2013.6545591 B. Chen, J.F. Kang, P. Huang, Y.X. Deng, B. Gao, R. Liu, , et al., "Multi-level resistive switching characteristics correlated with microscopic filament geometry in TMO-RRAM, in: International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA), 2013, pp. 1-2.
IEEE Electron Device Lett., Xiaoxin 36 555 2015 10.1109/LED.2015.2427393 Degradation of gate voltage controlled multilevel storage in one transistor one resistor electrochemical metallization cell
IEEE J. Solid-State Circuits Chang 48 878 2013 10.1109/JSSC.2012.2230515 A high-speed 7.2-ns read-write random access 4-mb embedded resistive ram (reram) macro using process-variation-tolerant current-mode read schemes
IEEE J. Solid-State Circuits Tajalli 43 1699 2008 10.1109/JSSC.2008.922709 Subthreshold source-coupled logic circuits for ultra-low-power Applications
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