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Method of cleaning wafer substrates 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • B44C-001/22
  • H01L-021/00
출원번호 US-0874851 (1997-06-13)
발명자 / 주소
  • MacLeish Joseph H.
  • Sanganeria Mahesh K.
출원인 / 주소
  • Mattson Technology, Inc.
대리인 / 주소
    Skjerven, Morrill, MacPherson, Franklin & Friel LLPChen
인용정보 피인용 횟수 : 63  인용 특허 : 3

초록

The silicon surface of a wafer is cleaned at room temperature in a separate pre-clean chamber prior to epitaxial deposition. Fluorine atoms generated, for example, from NF.sub.3 gas, enter the pre-clean chamber, contact the silicon surface, and etch away native oxide, contaminated silicon, and other

대표청구항

[ We claim:] [1.] A method for cleaning a silicon surface comprising:inserting a wafer into a pre-clean chamber, wherein said pre-clean chamber is separate from a deposition chamber; andintroducing a nitrogen trifluoride gas mixture into said pre-clean chamber, wherein said wafer in said pre-clean c

이 특허에 인용된 특허 (3)

  1. Webb Jennifer M. (San Jose CA) Szwejkowski Chester A. (Santa Cruz CA) Amini Zahra H. (Cupertino CA), Dry process for removal of undesirable oxide and/or silicon residues from semiconductor wafer after processing.
  2. Langan John G. (Wescosville PA) Beck Scott E. (Kutztown PA) Felker Brian S. (Allentown PA), Method for plasma etching or cleaning with diluted NF3.
  3. Narita Tomonori (Tokyo JPX), Method of forming conductive layer including removal of native oxide.

이 특허를 인용한 특허 (63)

  1. Liu, Xinye; Collins, Joshua; Ashtiani, Kaihan A., Adsorption based material removal process.
  2. Liu,Xinye; Collins,Joshua; Ashtiani,Kaihan A., Adsorption based material removal process.
  3. Anna Lena Thilderkvist ; Paul Comita ; Lance Scudder ; Norma Riley, Apparatus and method for surface finishing a silicon film.
  4. Comita, Paul B.; Thilderkvist, Karin Anna Lena; Scudder, Lance, Apparatus and method for surface finishing a silicon film.
  5. Thilderkvist, Anna Lena; Comita, Paul; Scudder, Lance; Riley, Norma, Apparatus and method for surface finishing a silicon film.
  6. Conchieri, Brian P.; Dussault, David D.; Ishaq, Mousa H., Apparatus and system for eliminating contaminants on a substrate surface.
  7. van Schravendijk, Bart; te Nijenhuis, Harald, Atomic layer removal for high aspect ratio gapfill.
  8. Draeger, Nerissa; te Nijenhuis, Harald; Meinhold, Henner; van Schravendijk, Bart; Nittala, Lakshmi, Atomic layer removal process with higher etch amount.
  9. Cohen Barney M. ; Su Jingang ; Ngan Kenny King-Tai ; Chen Jr-Jyan, Cleaning contact with successive fluorine and hydrogen plasmas.
  10. Henley, Francois J.; Cheung, Nathan W., Controlled process and resulting device.
  11. Henley, Francois J.; Cheung, Nathan W., Controlled process and resulting device.
  12. Kelman, Maxim; Jia, Zhongyuan; Nag, Somnath; Ditizio, Robert, Formation of a layer on a semiconductor substrate.
  13. Ramachandran, Balasubramanian; Kim, Tae Jung; Sun, Jung Hoon; Lee, Joung Woo; Lim, Hwa Joong; Lee, Sang Phil; Ranish, Joseph M., In-situ chamber cleaning for an RTP chamber.
  14. Lill, Thorsten; Berry, III, Ivan L.; Shen, Meihua; Schoepp, Alan M.; Hemker, David J., Isotropic atomic layer etch for silicon and germanium oxides.
  15. Berry, III, Ivan L.; Park, Pilyeon; Yaqoob, Faisal, Isotropic atomic layer etch for silicon oxides using no activation.
  16. Henley, Francois J., Layer transfer of films utilizing controlled propagation.
  17. Henley, Francois J., Layer transfer of films utilizing controlled shear region.
  18. Henley, Francois J., Method and structure for fabricating solar cells using a thick layer transfer process.
  19. Chaudhry,Samir; Roy,Pradip K., Method and structure for graded gate oxides on vertical and non-planar surfaces.
  20. Schuegraf, Klaus F., Method and system for fabricating a bipolar transistor and related structure.
  21. Chang, Jane; Lin, You-Sheng; Kepten, Avishai; Sendler, Michael; Levy, Sagy; Bloom, Robin, Method for depositing a coating having a relatively high dielectric constant onto a substrate.
  22. Chou, Shih-Wei; Wu, Chii-Ming, Method for depositing an adhesion/barrier layer to improve adhesion and contact resistance.
  23. Ryu,Choon Kun, Method for forming isolation layer in semiconductor device.
  24. Brady, David Charles; Ma, Yi; Roy, Pradip Kumar, Method for making an integrated circuit device including a graded, grown, high quality gate oxide layer and a nitride layer.
  25. Lin, Benjamin Szu-Min, Method for removing native oxide.
  26. Bamnolker, Hanna; Phatak, Prashant; Raghuram, Usha; Geha, Sam, Method of forming contact openings.
  27. Kumar Pradip Roy ; Ranbir Singh, Method of making bipolar transistor semiconductor device including graded, grown, high quality oxide layer.
  28. Asami, Taketomi; Ichijo, Mitsuhiro; Toriumi, Satoshi, Method of manufacturing a semiconductor device.
  29. Asami, Taketomi; Ichijo, Mitsuhiro; Toriumi, Satoshi, Method of manufacturing a semiconductor device.
  30. Asami, Taketomi; Ichijo, Mitsuhiro; Toriumi, Satoshi, Method of manufacturing a semiconductor device.
  31. Asami,Taketomi; Ichijo,Mitsuhiro; Toriumi,Satoshi, Method of manufacturing a semiconductor device with a fluorine concentration.
  32. Asami, Taketomi; Ichijo, Mitsuhiro; Toriumi, Satoshi, Method of manufacturing a semiconductor device with fluorine concentration.
  33. Cheng, Yi-Lung; Yoo, Ming-Hwa; Wu, Sze-An; Wang, Ying-Lung, Method to neutralize charge imbalance following a wafer cleaning process.
  34. Zhang, Jingyan; Ping, Er-Xuan, Methods for epitaxial silicon growth.
  35. Zhang, Jingyan; Ping, Er-Xuan, Methods for epitaxial silicon growth.
  36. Zhang,Jingyan; Ping,Er Xuan, Methods for epitaxial silicon growth.
  37. Liu, Xinye; Yang, Yu; Lai, Chiukin Steven, Methods for removing silicon nitride and other materials during fabrication of contacts.
  38. Liu, Xinye; Lai, Chiukin Steven, Modulating etch selectivity and etch rate of silicon nitride thin films.
  39. Liu, Xinye; Lai, Chiukin Steven, Modulating etch selectivity and etch rate of silicon nitride thin films.
  40. Roy, Kumar Pradip; Singh, Ranbir, Non-volatile memory semiconductor device including a graded, grown, high quality control gate oxide layer and associated methods.
  41. Roy, Kumar Pradip; Singh, Ranbir, Non-volatile memory semiconductor device including a graded, grown, high quality oxide layer and associated methods.
  42. Elliott, David J.; Thompson, Allan R.; Whitten, George D.; Camp, Jonathan C.; Krajewski, Mark T., Photocatalytic reactor system for treating flue effluents.
  43. Ishihara, Masunori; Sakaguchi, Masamichi; Nishimori, Yasuhiro; Kudou, Yutaka; Une, Satoshi, Plasma processing method.
  44. Kelman, Maxim; Khandan, Shahab; Dunham, Scott; Huynh, Tac van; Teo, Kenneth B. K., Preparing a semiconductor surface for epitaxial deposition.
  45. Miller, Sheri; Krishna, Vinay; Viswanathan, Sriram, Process for post contact-etch clean.
  46. Kobayashi, Yasuo; Yoshioka, Masao, Processing apparatus and processing method.
  47. Henley, Francois J.; Brailove, Adam, Race track configuration and method for wafering silicon solar substrates.
  48. Elliott,David J.; Harte,Kenneth J.; Shephard,Larry E., Scanning plasma reactor.
  49. Malik, Igor J.; Kang, Sien G., Smoothing method for cleaved films made using a release layer.
  50. Sien G. Kang ; Igor J. Malik, Smoothing method for cleaved films made using a release layer.
  51. Igor J. Malik ; Sien G. Kang, Smoothing method for cleaved films made using thermal treatment.
  52. Malik Igor J. ; Kang Sien G., Smoothing method for cleaved films made using thermal treatment.
  53. Henley, Francois; Lamm, Al; Chow, Yi-Lei, Substrate cleaving under controlled stress conditions.
  54. Henley, Francois; Lamm, Al; Chow, Yi-Lei, Substrate cleaving under controlled stress conditions.
  55. Henley, Francois; Lamm, Al; Chow, Yi-Lei, Substrate cleaving under controlled stress conditions.
  56. Kang Sien G. ; Malik Igor J., Surface finishing of SOI substrates using an EPI process.
  57. Kang,Sien G.; Malik,Igor J., Surface finishing of SOI substrates using an EPI process.
  58. Schuegraf, Klaus F., System for fabricating a bipolar transistor.
  59. Chen, Yuanning; Chetlur, Sundar Srinivasan; Roy, Pradip Kumar, TWO-STEP OXIDATION PROCESS FOR OXIDIZING A SILICON SUBSTRATE WHEREIN THE FIRST STEP IS CARRIED OUT AT A TEMPERATURE BELOW THE VISCOELASTIC TEMPERATURE OF SILICON DIOXIDE AND THE SECOND STEP IS CARRIE.
  60. Brailove, Adam; Liu, Zuqin; Henley, Francois J.; Lamm, Albert J., Techniques for forming thin films by implantation with reduced channeling.
  61. Adam, Thomas N.; Cheng, Kangguo; Khakifirooz, Ali; Reznicek, Alexander; Sadana, Devendra K.; Shahidi, Ghavam G., Thin body semiconductor devices.
  62. Kang, Sien G.; Malik, Igor J., Treatment method of film quality for the manufacture of substrates.
  63. Conchieri, Brian P.; Dussault, David D.; Ishaq, Mousa H., Treatment to eliminate polysilicon defects induced by metallic contaminants.
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