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In a field effect type device having a thin film-like active layer, there is provided a thin film-like semiconductor device including a top side gate electrode on the active layer and a bottom side gate electrode connected to a static potential, the bottom side gate electrode being provided between

In a field effect type device having a thin film-like active layer, there is provided a thin film-like semiconductor device including a top side gate electrode on the active layer and a bottom side gate electrode connected to a static potential, the bottom side gate electrode being provided between the active layer and a substrate. The bottom side gate electrode may be electrically connected to only one of a source and a drain of the field effect type device. Also, the production methods therefor are disclosed.

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1. An electronic device comprising at least one thin film transistor, said thin film transistor comprising:a substrate having an insulating surface;a semiconductor layer formed over said insulating surface;a source region and a drain region formed in said semiconductor layer;a channel region in said

1. An electronic device comprising at least one thin film transistor, said thin film transistor comprising:a substrate having an insulating surface;a semiconductor layer formed over said insulating surface;a source region and a drain region formed in said semiconductor layer;a channel region in said semiconductor layer between said source region and said drain region;a first gate electrode adjacent to one side of said channel region; anda second gate electrode adjacent to the other side of said channel region opposed to said first gate electrode,wherein said second gate electrode is overlapped with said source region and said second gate electrode is not overlapped with said drain region,wherein said second gate electrode is overlapped with a first portion of said channel region so that a second portion of said channel region is offset from said second gate electrode while said first gate electrode is overlapped with an entire portion of said channel region,wherein said second gate electrode and source region are electrically connected, andwherein said electronic device is a logic circuit. 2. The device of claim 1 wherein said second gate electrode comprises a material selected from the group consisting of a doped polysilicon, chromium, tantalum and tungsten. 3. The device of claim 1 wherein said substrate is a quartz. 4. The device of claim 1 wherein said channel region is formed of crystalline silicon. 5. The device of claim 1 wherein said first gate electrode is formed over said semiconductor layer with an insulating film interposed therebetween. 6. An electronic device comprising at least one thin film transistor, said thin film transistor comprising:a substrate having an insulating surface;a semiconductor layer formed over said insulating surface;a source region and a drain region formed in said semiconductor layer;a channel region in said semiconductor layer between said source region and said drain region;a first gate electrode adjacent to one side of said channel region; anda second gate electrode adjacent to the other side of said channel region opposed to said first gate electrode,wherein said second gate electrode is overlapped with said source region and said second gate electrode is not overlapped with said drain region,wherein said second gate electrode is overlapped with a first portion of said channel region so that a second portion of said channel region is offset from said second gate electrode while said first gate electrode is overlapped with an entire portion of said channel region,wherein said second gate electrode and source region are electrically connected, andwherein said electronic device is a memory. 7. The device of claim 6 wherein said second gate electrode comprises a material selected from the group consisting of a doped polysilicon, chromium, tantalum and tungsten. 8. The device of claim 6 wherein said substrate is a quartz. 9. The device of claim 6 wherein said channel region is formed of crystalline silicon. 10. The device of claim 6 wherein said first gate electrode is formed over said semiconductor layer with an insulating film interposed therebetween. 11. An electronic device comprising:at least p-channel thin film transistor and an n-channel thin film transistor provided over a substrate having an insulating surface,wherein each of said p-channel thin film transistor and said n-channel thin film transistor comprises a pair of impurity regions, a channel region provided between said impurity regions, and a first gate electrode provided over said channel region with a first gate insulating film therebetween,wherein only said n-channel thin film transistor further comprises a second gate electrode below said channel region with a second insulating film therebetween,wherein said second gate electrode is overlapped with said pair of impurity regions and said channel region, andwherein said electronic device is a liquid crystal display device. 12. The device of claim 11 wherein said second gat e electrode comprises a material selected from the group consisting of a doped polysilicon, chromium, tantalum and tungsten. 13. The device of claim 11 wherein said substrate is a quartz. 14. The device of claim 11 wherein said channel region is formed of crystalline silicon. 15. An electronic device comprising:at least p-channel thin film transistor and an n-channel thin film transistor provided over a substrate having an insulating surface,wherein each of said p-channel thin film transistor and said n-channel thin film transistor comprises a pair of impurity regions, a channel region provided between said impurity regions, and a first gate electrode provided over said channel region with a first gate insulating film therebetween,wherein only said n-channel thin film transistor further comprises a second gate electrode below said channel region with a second insulating film therebetween,wherein said second gate electrode is overlapped with said pair of impurity regions and said channel region, andwherein said electronic device is a logic circuit. 16. The device of claim 15 wherein said second gate electrode comprises a material selected from the group consisting of a doped polysilicon, chromium, tantalum and tungsten. 17. The device of claim 15 wherein said substrate is a quartz. 18. The device of claim 15 wherein said channel region is formed of crystalline silicon. 19. An electronic device comprising:at least p-channel thin film transistor and an n-channel thin film transistor provided over a substrate having an insulating surface,wherein each of said p-channel thin film transistor and said n-channel thin film transistor comprises a pair of impurity regions, a channel region provided between said impurity regions, and a first gate electrode provided over said channel region with a first gate insulating film therebetween,wherein only said n-channel thin film transistor further comprises a second gate electrode below said channel region with a second insulating film therebetween,wherein said second gate electrode is overlapped with said pair of impurity regions and said channel region, andwherein said electronic device is a memory. 20. The device of claim 19 wherein said second gate electrode comprises a material selected from the group consisting of a doped polysilicon, chromium, tantalum and tungsten. 21. The device of claim 19 wherein said substrate is a quartz. 22. The device of claim 19 wherein said channel region is formed of crystalline silicon. 23. An electronic device comprising:at least a p-channel thin film transistor and an n-channel thin film transistor provided over a substrate having an insulating surface,wherein each of said p-channel thin film transistor and said n-channel thin film transistor comprises a pair of impurity regions, a channel region provided between said impurity regions, and a first gate electrode provided over said channel region with a first gate insulating film therebetween,wherein only said n-channel thin film transistor further comprises a second gate electrode below said channel region with a second insulating film therebetween,wherein said second gate electrode is overlapped with said pair of impurity regions and said channel region,wherein said second gate electrode is grounded, andwherein said electronic device is a liquid crystal display device. 24. The device of claim 23 wherein said second gate electrode comprises a material selected from the group consisting of a doped polysilicon, chromium, tantalum and tungsten. 25. The device of claim 23 wherein said substrate is a quartz. 26. The device of claim 23 wherein said channel region is formed of crystalline silicon. 27. An electronic device comprising:at least a p-channel thin film transistor and an n-channel thin film transistor provided over a substrate having an insulating surface,wherein each of said p-channel thin film transistor and said n-channel thin film transistor comprises a pair of impurity regions, a channel region provi ded between said impurity regions, and a first gate electrode provided over said channel region with a first gate insulating film therebetween,wherein only said n-channel thin film transistor further comprises a second gate electrode below said channel region with a second insulating film therebetween,wherein said second gate electrode is overlapped with said pair of impurity regions and said channel region,wherein said second gate electrode is grounded, andwherein said electronic device is a logic circuit. 28. The device of claim 27 wherein said second gate electrode comprises a material selected from the group consisting of a doped polysilicon, chromium, tantalum and tungsten. 29. The device of claim 27 wherein said substrate is a quartz. 30. The device of claim 27 wherein said channel region is formed of crystalline silicon. 31. An electronic device comprising:at least a p-channel thin film transistor and an n-channel thin film transistor provided over a substrate having an insulating surface,wherein each of said p-channel thin film transistor and said n-channel thin film transistor comprises a pair of impurity regions, a channel region provided between said impurity regions, and a first gate electrode provided over said channel region with a first gate insulating film therebetween,wherein only said n-channel thin film transistor further comprises a second gate electrode below said channel region with a second insulating film therebetween,wherein said second gate electrode is overlapped with said pair of impurity regions and said channel region,wherein said second gate electrode is grounded, andwherein said electronic device is a memory. 32. The device of claim 31 wherein said second gate electrode comprises a material selected from the group consisting of a doped polysilicon, chromium, tantalum and tungsten. 33. The device of claim 31 wherein said substrate is a quartz. 34. The device of claim 31 wherein said channel region is formed of crystalline silicon. 35. An electronic device comprising:at least p-channel thin film transistor and an n-channel thin film transistor provided over a substrate having an insulating surface,wherein each of said p-channel thin film transistor and said n-channel thin film transistor comprises a pair of impurity regions, a channel region provided between said impurity regions, and a first gate electrode provided over said channel region with a first gate insulating film therebetween,wherein only said n-channel thin film transistor further comprises a second gate electrode below said channel region with a second insulating film therebetween,wherein said second gate electrode is overlapped with said pair of impurity regions and said channel region,wherein said second gate electrode and said one of said pair of impurity regions are electrically connected, andwherein said electronic device is a liquid crystal display device. 36. The device of claim 35 wherein said second gate electrode comprises a material selected from the group consisting of a doped polysilicon, chromium, tantalum and tungsten. 37. The device of claim 35 wherein said substrate is a quartz. 38. The device of claim 35 wherein said channel region is formed of crystalline silicon. 39. An electronic device comprising:at least p-channel thin film transistor and an n-channel thin film transistor provided over a substrate having an insulating surface,wherein each of said p-channel thin film transistor and said n-channel thin film transistor comprises a pair of impurity regions, a channel region provided between said impurity regions, and a first gate electrode provided over said channel region with a first gate insulating film therebetween,wherein only said n-channel thin film transistor further comprises a second gate electrode below said channel region with a second insulating film therebetween,wherein said second gate electrode is overlapped with said pair of impurity regions and said channel region,wherein said second gate electrode and said one of said pair of impurity regions are electrically connected, andwherein said electronic device is a logic circuit. 40. The device of claim 39 wherein said second gate electrode comprises a material selected from the group consisting of a doped polysilicon, chromium, tantalum and tungsten. 41. The device of claim 39 wherein said substrate is a quartz. 42. The device of claim 39 wherein said channel region is formed of crystalline silicon. 43. An electronic device comprising:at least p-channel thin film transistor and an n-channel thin film transistor provided over a substrate having an insulating surface,wherein each of said p-channel thin film transistor and said n-channel thin film transistor comprises a pair of impurity regions, a channel region provided between said impurity regions, and a first gate electrode provided over said channel region with a first gate insulating film therebetween,wherein only said n-channel thin film transistor further comprises a second gate electrode below said channel region with a second insulating film therebetween,wherein said second gate electrode is overlapped with said pair of impurity regions and said channel region,wherein said second gate electrode and said one of said pair of impurity regions are electrically connected, andwherein said electronic device is a memory. 44. The device of claim 43 wherein said second gate electrode comprises a material selected from the group consisting of a doped polysilicon, chromium, tantalum and tungsten. 45. The device of claim 43 wherein said substrate is a quartz. 46. The device of claim 43 wherein said channel region is formed of crystalline silicon. 47. An electronic device comprising:a CMOS circuit comprising a p-channel thin film transistor and an n-channel thin film transistor provided over a substrate having an insulating surface,wherein each of said p-channel thin film transistor and said n-channel thin film transistor comprises a pair of impurity regions, a channel region provided between said impurity regions, and a first gate electrode provided over said channel region with a first gate insulating film therebetween,wherein only said n-channel thin film transistor further comprises a second gate electrode below said channel region with a second insulating film therebetween,wherein said second gate electrode is overlapped with said pair of impurity regions and said channel region, andwherein said electronic device is a liquid crystal display device. 48. The device of claim 47 wherein said second gate electrode comprises a material selected from the group consisting of a doped polysilicon, chromium, tantalum and tungsten. 49. The device of claim 47 wherein said substrate is a quartz. 50. The device of claim 47 wherein said channel region is formed of crystalline silicon. 51. An electronic device comprising:a CMOS circuit comprising a p-channel thin film transistor and an n-channel thin film transistor provided over a substrate having an insulating surface,wherein each of said p-channel thin film transistor and said n-channel thin film transistor comprises a pair of impurity regions, a channel region provided between said impurity regions, and a first gate electrode provided over said channel region with a first gate insulating film therebetween,wherein only said n-channel thin film transistor further comprises a second gate electrode below said channel region with a second insulating film therebetween,wherein said second gate electrode is overlapped with said pair of impurity regions and said channel region, andwherein said electronic device is a logic circuit. 52. The device of claim 51 wherein said second gate electrode comprises a material selected from the group consisting of a doped polysilicon, chromium, tantalum and tungsten. 53. The device of claim 51 wherein said substrate is a quartz. 54. The device of claim 51 wherein said channel region is formed of crystalline silicon. 55. An electronic device comprising:a CMOS circ uit comprising a p-channel thin film transistor and an n-channel thin film transistor provided over a substrate having an insulating surface,wherein each of said p-channel thin film transistor and said n-channel thin film transistor comprises a pair of impurity regions, a channel region provided between said impurity regions, and a first gate electrode provided over said channel region with a first gate insulating film therebetween,wherein only said n-channel thin film transistor further comprises a second gate electrode below said channel region with a second insulating film therebetween,wherein said second gate electrode is overlapped with said pair of impurity regions and said channel region, andwherein said electronic device is a memory. 56. The device of claim 55 wherein said second gate electrode comprises a material selected from the group consisting of a doped polysilicon, chromium, tantalum and tungsten. 57. The device of claim 55 wherein said substrate is a quartz. 58. The device of claim 55 wherein said channel region is formed of crystalline silicon.