Abstract ▼ AI-Helper

The purpose of this study is to develop the core unit process for SiC-based MOSFET Fabrications. This study includes two main categories. One is for 4H-SiC MOSFET gate oxidation. I investigated the improvement of surface roughness and states after high temperature annealing using reduced-graphene ox...

The purpose of this study is to develop the core unit process for SiC-based MOSFET Fabrications. This study includes two main categories. One is for 4H-SiC MOSFET gate oxidation. I investigated the improvement of surface roughness and states after high temperature annealing using reduced-graphene oxide (r-GO) capping layer on ion-implanted 4H-SiC epitaxial layer. And electrical properties of SiO2 gate oxides on 4H-SiC were analyzed with NO post annealing formed by thermal oxidation and atomic layer deposition (ALD).
The other is to study the optimum conditions for the trench etch profile and gate oxidation, which are important problems in the SiC trench MOSFET. A study was conducted to improve the micro-trench, which is pointed out as the biggest problem in the SiC trench MOSFET. Ar reshape process was used and trench shapes were observed as a function of temperature and process time. Additionally, in order to confirm the oxidation characteristics of the Re-Shaped SiC interface, dry/wet oxidation were carried out.