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NTIS 바로가기Microelectronic engineering, v.86 no.10, 2009년, pp.2078 - 2085
Poljak, M. (Department of Electronics, Microelectronics, Computer and Intelligent Systems, Faculty of Electrical Engineering and Computing, University of Zagreb, Unska 3, HR-10000 Zagreb, Croatia) , Jovanovic, V. , Suligoj, T.
The implementation of FinFET structure in bulk silicon wafers is very attractive due to low-cost technology and compatibility with standard bulk CMOS in comparison with silicon-on-insulator (SOI) FinFET. SOI and bulk FinFET were analyzed by a three-dimensional numerical device simulator. We have sho...
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