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NTIS 바로가기IEEE transactions on electron devices, v.65 no.4, 2018년, pp.1653 - 1657
Anvarifard, Mohammad Kazem (Department of Engineering Sciences, Faculty of Technology and Engineering, East of Guilan, University of Guilan, Rasht, Iran) , Orouji, Ali Asghar (Department of Electrical and Computer Engineering, Semnan University, Semnan, Iran)
This brief is describing a useful idea to reform the distribution of the electric field for nanosilicon-on-insulator metal–oxide–semiconductors-field-effect transistors. The approach we benefit from it is to develop a part of the channel region into the drain region. This technique mod...
Anvarifard, Mohammad K., Orouji, Ali Asghar. Improvement of Electrical Properties in a Novel Partially Depleted SOI MOSFET With Emphasizing on the Hysteresis Effect. IEEE transactions on electron devices, vol.60, no.10, 3310-3317.
ATLAS User’s Manual 2-D Device Simulator 2015
Zareiee, M.. A novel high performance nano-scale MOSFET by inserting Si3N4 layer in the channel. Superlattices and microstructures, vol.88, 254-261.
Rahimian, Morteza, Fathipour, Morteza. Improvement of electrical performance in junctionless nanowire TFET using hetero-gate-dielectric. Materials science in semiconductor processing, vol.63, 142-152.
Saremi, M., Saremi, M., Niazi, H., Saremi, M., Goharrizi, A. Y.. SOI LDMOSFET with Up and Down Extended Stepped Drift Region. Journal of electronic materials, vol.46, no.10, 5570-5576.
Saremi, M., Afzali-Kusha, A., Mohammadi, S.. Ground plane fin-shaped field effect transistor (GP-FinFET): A FinFET for low leakage power circuits. Microelectronic engineering, vol.95, 74-82.
Esseni, D., Mastrapasqua, M., Celler, G.K., Fiegna, C., Selmi, L., Sangiorgi, E.. Low field electron and hole mobility of SOI transistors fabricated on ultrathin silicon films for deep submicrometer technology application. IEEE transactions on electron devices, vol.48, no.12, 2842-2850.
Zareiee, Meysam. Modifying Buried Layers in Nano-MOSFET for Achieving Reliable Electrical Characteristics. ECS journal of solid state science and technology : jss, vol.5, no.10, M113-M117.
Jamali Mahabadi, S.E., Rajabi, Saba, Loiacono, Julian. A novel partial SOI LDMOSFET with periodic buried oxide for breakdown voltage and self heating effect enhancement. Superlattices and microstructures, vol.85, 872-879.
Anvarifard, Mohammad K., Orouji, Ali A.. Stopping electric field extension in a modified nanostructure based on SOI technology - A comprehensive numerical study. Superlattices and microstructures, vol.111, 206-220.
IEEE Electron Device Lett I-gate body-tied silicon-on-insulator MOSFETs with improved high-frequency performance chieh-lin 2011 10.1109/LED.2011.2106755 32 443
Ohno, T., Kado, Y., Harada, M., Tsuchiya, T.. Experimental 0.25-μm-gate fully depleted CMOS/SIMOX process using a new two-step LOCOS isolation technique. IEEE transactions on electron devices, vol.42, no.8, 1481-1486.
Advances in MOSFETs Silicon-on-insulator technology jaju 2004 ee530 1
Aminbeidokhti, A., Orouji, A. A., Rahimian, M.. High-Voltage and RF Performance of SOI MESFET Using Controlled Electric Field Distribution. IEEE transactions on electron devices, vol.59, no.10, 2842-2845.
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