IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0606265
(2015-01-27)
|
등록번호 |
US-9620582
(2017-04-11)
|
발명자
/ 주소 |
- Hsieh, Ching-Pei
- Hsu, Chern-Yow
- Liu, Shih-Chang
|
출원인 / 주소 |
- Taiwan Semiconductor Manufacturing Co., Ltd.
|
대리인 / 주소 |
Eschweiler & Potashnik, LLC
|
인용정보 |
피인용 횟수 :
0 인용 특허 :
3 |
초록
▼
The present disclosure relates a metal-insulator-metal (MIM) capacitor. In some embodiments, the MIM capacitor has a capacitor bottom metal (CBM) electrode arranged over a semiconductor substrate. The MIM capacitor has a high-k dielectric disposed over the CBM electrode and a capacitor top metal (CT
The present disclosure relates a metal-insulator-metal (MIM) capacitor. In some embodiments, the MIM capacitor has a capacitor bottom metal (CBM) electrode arranged over a semiconductor substrate. The MIM capacitor has a high-k dielectric disposed over the CBM electrode and a capacitor top metal (CTM) electrode arranged over the high-k dielectric layer. The MIM capacitor has a dummy structure that is disposed vertically over the high-k dielectric layer and laterally apart from the CTM electrode. The dummy structure includes a conductive body having a same material as the CTM electrode.
대표청구항
▼
1. A metal-insulator-metal (MIM) capacitor, comprising: a capacitor bottom metal (CBM) electrode disposed over a semiconductor substrate;a high-k dielectric layer disposed over the CBM electrode;a capacitor top metal (CTM) electrode disposed over the high-k dielectric layer; anda dummy structure dis
1. A metal-insulator-metal (MIM) capacitor, comprising: a capacitor bottom metal (CBM) electrode disposed over a semiconductor substrate;a high-k dielectric layer disposed over the CBM electrode;a capacitor top metal (CTM) electrode disposed over the high-k dielectric layer; anda dummy structure disposed vertically over the high-k dielectric layer, wherein the dummy structure comprises a conductive body having a same material as the CTM electrode and laterally apart from the CTM electrode. 2. The MIM capacitor of claim 1, further comprising one or more sidewall spacers extending along sidewalls of the dummy structure and the CTM electrode, wherein sidewalls of the high-k dielectric and the CBM electrode are vertically aligned with a sidewall of the sidewall spacer. 3. The MIM capacitor of claim 2, wherein the one or more sidewall spacers comprise silicon nitride (SiN). 4. The MIM capacitor of claim 1, further comprising: a CBM contact via disposed on an upper surface of the CBM electrode at a position between the CTM electrode and the dummy structure; anda CTM contact via disposed on an upper surface of the CTM electrode. 5. The MIM capacitor of claim 1, wherein the CBM electrode comprises a conductive liner disposed along bottom and side surfaces of a plurality of trenches within a dielectric layer disposed over the semiconductor substrate and extending along an upper surface of the dielectric layer;wherein the high-k dielectric layer comprises a dielectric liner disposed along an upper surface of the CBM electrode; andwherein the CTM electrode is disposed in the trenches at positions laterally arranged between the side surfaces of the trenches and laterally extends along an upper surface of the dielectric layer. 6. The MIM capacitor of claim 1, further comprising: a CTM mask disposed on the CTM electrode;wherein the dummy structure further comprises a dummy mask that is disposed on the conductive body at a location laterally aligned with the CTM mask, and that comprises a same material as the CTM mask. 7. The MIM capacitor of claim 6, wherein the CTM mask comprises silicon nitride (SiN), silicon oxy-nitride (SiON), or silicon carbide (SiC). 8. The MIM capacitor of claim 1, further comprising an etch stop layer disposed between an upper surface of the semiconductor substrate and the CBM electrode. 9. The MIM capacitor of claim 8, wherein the etch stop layer comprises silicon nitride (SiN) or silicon carbide (SiC). 10. The MIM capacitor of claim 1, wherein the CTM electrode and CBM electrode comprise aluminum (Al), tantalum (Ta), tantalum nitride (TaN), titanium (Ti), titanium nitride (TiN), or combinations thereof. 11. The MIM capacitor of claim 1, wherein the high-k dielectric layer comprises titanium (Ti), platinum (Pt), ruthenium (Ru), hafnium oxide (HfOx), aluminum oxide (AlOx), tantalum oxide (TaOx), or combinations thereof. 12. A metal-insulator-metal (MIM) capacitor, comprising: a plurality of trenches disposed within a dielectric material overlying a semiconductor substrate;a capacitor bottom metal (CBM) electrode disposed along bottom and side surfaces of the plurality of trenches and extending laterally along an upper surface of the dielectric material;a high-k dielectric layer disposed along an upper surface of the CBM electrode; anda capacitor top metal (CTM) electrode comprising a conductive body disposed within spaces in the plurality of trenches that are not filled by the CBM electrode and the high-k dielectric layer, and laterally set back from an edge of the CBM electrode. 13. The MIM capacitor of claim 12, further comprising: a CTM mask vertically overlying the CTM electrode; andone or more sidewall spacers extending along sidewalls of the CTM electrode and the CTM mask. 14. The MIM capacitor of claim 13, further comprising: a CBM contact via vertically extending through the one or more sidewall spacers and disposed on an upper surface of the CBM electrode not covered by the CTM electrode; anda CTM contact via disposed on an upper surface of the CTM electrode. 15. The MIM capacitor of claim 14, further comprising: a dummy structure laterally spaced apart from the CTM electrode by the CBM contact via, and comprising a conductive body made of a same material as the CTM electrode and an overlying dummy mask;wherein sidewalls of the dummy structure laterally abut the sidewall spacer. 16. A metal-insulator-metal (MIM) capacitor, comprising: a dielectric layer disposed over a substrate, the dielectric layer comprising a plurality of trenches extending downwardly from an upper surface of the dielectric layer;a capacitor bottom metal (CBM) electrode disposed along bottom and side surfaces of the plurality of trenches and extending laterally along the upper surface of the dielectric layer;a high-k dielectric layer disposed along an upper surface of the CBM electrode;a capacitor top metal (CTM) electrode overlying the high-k dielectric layer, and laterally set back from an edge of the CBM electrode;a sidewall spacer having a first portion disposed along sidewalls of the CTM electrode; anda dummy structure disposed over the high-k dielectric layer and laterally spaced apart from the CTM electrode, wherein the dummy structure comprises a same material as the CTM electrode and has sidewalls covered by a second portion of the sidewall spacer. 17. The MIM capacitor of claim 16, further comprising: a CTM mask disposed on the CTM electrode; anda dummy mask disposed on the dummy structure. 18. The MIM capacitor of claim 16, further comprising: a CBM contact via vertically extending through the high-k dielectric layer and in contact with the upper surface of the CBM electrode; anda CTM contact via in contact with an upper surface of the CTM electrode. 19. The MIM capacitor of claim 16, wherein CTM electrode has a planar upper surface aligned with an upper surface of the dummy structure. 20. The MIM capacitor of claim 16, wherein the sidewall spacer has an outer sidewall aligned with outer sidewalls of the high-k dielectric layer and the CBM electrode.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.